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Manual Renesas HD151TS207SS

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  • Renesas HD151TS207SS - page 1

    Rev.1.00, Apr.25.2 003, page 1 of 38 HD151TS207SS Mother Board Clock Generator for Intel P4+ Chipset (Springdale) REJ03D0006-0100Z Preliminary Rev.1.00 Apr.25.2003 Description The HD151TS207SS is Intel CK409T type high-performan ce, low-skew, low-jitter, PC motherboard clo ck generator. It is specifically designed for Intel Pentium ® 4+ chipset. F ...

  • Renesas HD151TS207SS - page 2

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 2 of 38 Key Specifications • Supply Volt ages: VD D = 3.3 V±5% • CPU clock cycle to cycle jitter = |125ps| (SSC Disabled) • CPU clock group Skew = 100ps • 3V66 clock group Skew = 250psmax • PCI clock group Skew = 500p smax ...

  • Renesas HD151TS207SS - page 3

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 3 of 38 Pin Arrangement 1 2 3 4 5 6 7 8 9 10 REF0 REF1 VDD_REF XTAL_IN XTAL_OUT VSS_REF FS2/PCIF_0 FS4/PCIF_1 VDD_PCI VSS_PCI PCI_1 MODE/PCI_0 PCI_2 PCI_3 VDD_PCI VSS_PCI SEL100_200/PCI_4 SEL33_25/PCI_5 PCI_6 PWRDWN#/SAFE_F# 3V66_0/RESET# 3V66_1 VDD_3V66 PCIF_2 11 12 13 14 15 16 17 18 19 20 21 22 23 24 33 3 ...

  • Renesas HD151TS207SS - page 4

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 4 of 38 Pin Descriptions Pin name No. Type Description VSS_A 54 Ground for PLL VSS_CPU 45 Ground for outputs VSS_IREF 53 Ground for current reference VSS_SRC 39 VSS_3V66 25 VSS_PCI 11, 17 VSS_REF 6 VSS_48 33 Ground Ground for outputs VDD_A 55 3.3 V Power Supply for PLL VDD_CPU 42, 48 VDD_SRC 36 VDD_3V66 24 ...

  • Renesas HD151TS207SS - page 5

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 5 of 38 Pin Descriptions (cont.) Pin name No. Type Description PWRDWN#/ SAFE_F# 21 INPUT PULL–UP* PWRDWN# / SAFE_F# selectable input. Default is PWRDWN# input. Byte15[5] = “1” : SAFE_F# input. PWRDWN# is all clocks stop pin. Asynchronous active “Low” input. When asserted low, all output clocks ar ...

  • Renesas HD151TS207SS - page 6

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 6 of 38 Block Diagram 3V66[3:1] 1/M2 SSC2 1/N2 1/M1 SSC1 1/N1 1/M0 1/N0 OSC CK2 CK1 CK0 XTAL 14.318 MHz REF[1:0] (14.318MHz) CPU[2:0] CPU[2:0]# * : Latched Input pin. 3.3 V VDD_48 3.3 V VDD_A VSS_48 VSS_A 6 × 3.3V VDD 6 × VSS VSS_IREF IREF PCI[6:0] SRC# SRC *SEL48_24 *FS_4/3/2A/B *SEL33_25 *MODE TEST_CLK# ...

  • Renesas HD151TS207SS - page 7

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 7 of 38 I 2 C Controlled Register Bit Map Byte0 Cont rol Regi ster Bit Description Contents Type De f a u lt Note 7 Reserved R 0 6 Reserved R 0 5 Reserved R 0 4 Reserved R 0 3 PCI_Stop Reflects the current value of the external PCI_STOP# pin 0 = PCI_STOP# pin is Lo w 1 = PCI_STOP# pin is High RX 2 Reserved ...

  • Renesas HD151TS207SS - page 8

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 8 of 38 I 2 C Controlled Register Bit Map (cont.) Table3 FS_A and FS_B pin Input level Logic Lev el Min Voltage Max Voltage 0 (Low)  0.35V 1 (High) 0.70V  Byte1 Cont rol Regi ster Bit Description Contents Type De f a u lt Note 7 Allow control of SCR with assertion of PCI_STOP# 0 = Free running 1 = Sto ...

  • Renesas HD151TS207SS - page 9

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 9 of 38 I 2 C Controlled Register Bit Map (cont.) Table4 CPU Cl ock Power M anagem ent Truth Ta ble Signal Pin PWRDWN# PWRDWN# Tristate Bit Byte2[5:3] Non-Stop Outputs Byte1[5:3] = 1 Note CPU[2:0] 1 X Running CPU[2:0] 0 0 Driven @ Iref x2 See Note1 CPU[2:0] 0 1 Tristate Note: 1. Iref = VDD/(3Rr) = 3.3/(3x47 ...

  • Renesas HD151TS207SS - page 10

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 10 of 38 I 2 C Controlled Register Bit Map (cont.) Byte4 Cont rol Regi ster Bit Description Contents Type De f a u lt Note 7 USB_48 2x output drive 0 = 2x Drive strength, 1 = Normal RW 0 6 USB_48MHz Output Enable 0 = Disabled, 1 = Enabled RW 1 5 Allow control of PCIF_2 with assertion of PCI_STOP# 0 = Free R ...

  • Renesas HD151TS207SS - page 11

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 11 of 38 I 2 C Controlled Register Bit Map (cont.) Byte7 Ve ndor Identi fication Re gister Bit Description Contents Type De f a u lt Note 7 Revision Code Bit3 Vend or Specific R 0 6 Revision Code Bit2 Vend or Specific R 0 5 Revision Code Bit1 Vend or Specific R 0 4 Revision Code Bit0 Vend or Specific R 1 3 ...

  • Renesas HD151TS207SS - page 12

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 12 of 38 I 2 C Controlled Register Bit Map (cont.) Byte9 Cont rol Regi ster Bit Description Contents Type De f a u lt Note 7 SSC2 Enable Bit B6[2] = 0 or B9[7] = 1 : SSC2 =OFF B6[2] = 1 & B9[7] = 0 : SSC2 = ON RW 0 6 SSC1 Enable Bit B6[2] = 0 or B9[6] = 1 : SSC1 = OFF B6[2] = 1 & B9[6] = 0 : SSC1 = ...

  • Renesas HD151TS207SS - page 13

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 13 of 38 I 2 C Controlled Register Bit Map (cont.) Table6 Cloc k Frequency F unction Tabl e FS_4 FS_3 FS_2 FS_A FS_B No. B9[5] B9[4] B9[3] B9[2] B9[1] CPU [MHz] SRC [MHz] 3V66 [MHz] PCI [MHz] 0 0 0 0 0 0 100.02 100.02 66.68 33.34 1 0 0 0 0 1 200.03 100.02 66.68 33.34 2 0 0 0 1 0 133.36 100.02 66.68 33.34 3 ...

  • Renesas HD151TS207SS - page 14

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 14 of 38 I 2 C Controlled Register Bit Map (cont.) Byte10 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 RW 0 6 RW 0 5 SSC Spread Select Bit[2:0] Bit[2:0] = 000 = –0.500%, 100 = ±0.250% 001 = –0.750%, 101 = ±0.375% 010 = –1.000%, 110 = ±0.500% 011 = –1.500%, 111 = ±0.750% RW ...

  • Renesas HD151TS207SS - page 15

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 15 of 38 I 2 C Controlled Register Bit Map (cont.) Byte12 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 Reserved R/W 0 6 Reserved R/W 0 5 Reserved R/W 0 4 Reserved R/W 0 3 Reserved R/W 0 2 PLL1 Output (VCO1) Frequency Control Bit (M1/N1 Divider Control Bit) PLL1 : for SRC/3V66/PCI_PLL ...

  • Renesas HD151TS207SS - page 16

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 16 of 38 I 2 C Controlled Register Bit Map (cont.) Byte14 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 Reserved R/W 0 6 PLL1 M1 Divider Control Bit6 M1[6] R/W 0 5 PLL1 M1 Divider Control Bit5 M1[5] R/W 0 4 PLL1 M1 Divider Control Bit4 M1[4] R/W 1 3 PLL1 M1 Divider Control Bit3 M1[3] R ...

  • Renesas HD151TS207SS - page 17

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 17 of 38 I 2 C Controlled Register Bit Map (cont.) Byte16 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 3V66 divider ratio = 7 3V66 / PCI / PCIF Divider Control Bit3 R/W X 6 3V66 / PCI / PCIF Divider Control Bit2 0010 = 1/2, 0011 = 1/3, 0100 = 1/4, 0101 = 1/5, 0110 = 1/6, 0111 = 1/7 1000 ...

  • Renesas HD151TS207SS - page 18

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 18 of 38 I 2 C Controlled Register Bit Map (cont.) Byte18 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 VCO2 Frequency Control Bit7 R/W 0 6 VCO2 Frequency Control Bit6 R/W 0 5 VCO2 Frequency Control Bit5 R/W 0 4 VCO2 Frequency Control Bit4 These bits are 10MHz digit of VCO2 frequency. ...

  • Renesas HD151TS207SS - page 19

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 19 of 38 I 2 C Controlled Register Bit Map (cont.) Byte19 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 VCO2 Frequency Read Bit1 5 R 0 6 VCO2 Frequency Read Bit1 4 R 0 5 VCO2 Frequency Read Bit1 3 R 0 4 VCO2 Frequency Read Bit12 Calculation result of VCO2 frequency. 100 MHz digit 0000 ...

  • Renesas HD151TS207SS - page 20

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 20 of 38 I 2 C Controlled Register Bit Map (cont.) Byte22 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 CPU Frequency Read Bit7 R 0 6 CPU Frequency Read Bit6 R 0 5 CPU Frequency Read Bit5 R 0 4 CPU Frequency Read Bit4 Calculation result of CPU frequenc y. 1 MHz digit 0000 = 0, 0001 = 1 ...

  • Renesas HD151TS207SS - page 21

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 21 of 38 I 2 C Controlled Register Bit Map (cont.) Byte24 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 Reserved R/W 0 6 PCI_STOP# Stop PCI_6 Control Bit 0 = Stoppab le, 1 = Free running R/W 0 5 PCI_STOP# Stop PCI_5 Control Bit 0 = Stoppab le, 1 = Free running R/W 0 4 PCI_STOP# Stop PC ...

  • Renesas HD151TS207SS - page 22

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 22 of 38 I 2 C Controlled Register Bit Map (cont.) Byte26 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 PCIF / PCI Clock Skew2 Control Bit3 R/W 0 6 PCIF / PCI Clock Skew2 Control Bit2 R/W 0 5 PCIF / PCI Clock Skew2 Control Bit1 R/W 0 4 PCIF / PCI Clock Skew2 Control Bit0 Skew2 is “La ...

  • Renesas HD151TS207SS - page 23

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 23 of 38 I 2 C Controlled Register Bit Map (cont.) Byte28 Co ntrol Re gister Bit Description Contents Type De f a u lt Note 7 Reserved 0 = Normal, 1 = Late R/W 0 6 PCI_6 Skew Select Bit 0 = Normal, 1 = Late R/W 0 5 PCI_5 Skew Select Bit 0 = Normal, 1 = Late R/W 0 4 PCI_4 Skew Select Bit 0 = Normal, 1 = Late ...

  • Renesas HD151TS207SS - page 24

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 24 of 38 Clock Stop Timing Diagram 6 × Iref (Controled b y B y te2[6] ) 2 × Iref (Controled by Byte2[5:3]) T ristate (Controled by Byte2[6]) T ristate PCI_STOP# PCI_F PCI SRC (Stoppable) PCI_STOP# Assertion/De-assersion PCI_STOP# Assertion/De-assertion W aveforms Low PWRDWN# CPU (Stoppable) CPU# (Stoppabl ...

  • Renesas HD151TS207SS - page 25

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 25 of 38 Renesas clock generator I 2 C Serial Interfa ce Operation 1. Write mode 1.1 Controller (host) se nds a start bit. 1.2 Controller (host) sends the writ e address D2 (h). 1.3 Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”). 1.4 Controll er (h ost) sends a begi n by te M. ...

  • Renesas HD151TS207SS - page 26

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 26 of 38 Renesas clock generator I 2 C Serial Interfa ce Operation (cont.) 2. Read mode 2.1 Controller (host) se nds a start bit. 2.2 Controller (host) sends the wri te address D2 (h). 2.3 Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”). 2.4 Controll er (h ost) sends a begi n b ...

  • Renesas HD151TS207SS - page 27

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 27 of 38 Absolute Maximum Ratings Item Symbol Ratings Unit Conditions Supply voltage VDD –0.5 to 4.6 V Input voltage V I –0.5 to 4.6 V Output voltage *1 V O –0.5 to VDD +0.5 V Input clamp current I IK –50 mA V I < 0 Output clamp current I OK –50 mA V O < 0 Continuous output current I O ±50 ...

  • Renesas HD151TS207SS - page 28

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 28 of 38 DC Electrical Characterist ics / Serial Input Port Ta = 0°C to 70°C, VD D = 3.3 V Item Symbol Min Typ * 1 Max Unit Test Conditions Input Low Voltage V IL  0.8 V Input High Voltage V IH 2.0  V Input Current I I –50  +50 µA VI = 0 V or 3.465 V, VDD = 3.465 V Input capacitance C I ...

  • Renesas HD151TS207SS - page 29

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 29 of 38 DC Electrical Characteristics CPU/CPU# Clock Ta = 0°C to 70°C, VDD = 3.3 V, Iref = 475 Ω Item Symbol Min Typ * 1 Max Unit Test Conditions Output voltage V O  1.20 V Rp = 49.9 Ω , VDD = 3.3 V Output Current I O  I(nom) * 2  mA VDD = 3.3 V Output resistance 3000 Ω V O = 1.2 ...

  • Renesas HD151TS207SS - page 30

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 30 of 38 DC Electrical Characteristics SRC/SRC# Clock Ta = 0°C to 70°C, VDD = 3.3 V, Iref = 475 Ω Item Symbol Min Typ *1 Max Unit Test Conditions Output voltage V O  1.20 V Rp = 49.9 Ω , VDD = 3.3 V Output Current I O  I(nom)  mA VDD = 3.3 V Output resistance 3000 Ω V O = 1.2 V Not ...

  • Renesas HD151TS207SS - page 31

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 31 of 38 DC Electrical Characteristics / 3V66 Buffer (CK409T Type5 Buffer) Ta = 0°C to 70°C, VDD = 3 .3 V Item Symbol Min Typ *1 Max Unit Test Conditions V OH 3.1  VI OH = –1 mA, VDD = 3.3 V Output Voltage V OL  50 mV I OL = 1 mA, VDD = 3.3 V I OH  –33 mA V OH = 1.0 V Output Current ...

  • Renesas HD151TS207SS - page 32

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 32 of 38 DC Electrical Characteristics / PCI & PCIF Clock (CK409T Type5 Buffer) Ta = 0°C to 70°C, VD D = 3.3 V Item Symbol Min Typ * 1 Max Unit Test Conditions V OH 3.1  VI OH = –1 mA, VDD = 3.3 V Output Voltage V OL  50 mV I OL = 1 mA, VDD = 3.3 V I OH  –33 mA V OH = 1.0 V Outpu ...

  • Renesas HD151TS207SS - page 33

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 33 of 38 DC Electrical Characteristics / USB & VCH 48MHz Clock (CK409T Type3A Buffer) Ta = 0°C to 70°C, VD D = 3.3 V Item Symbol Min Typ * 1 Max Unit Test Conditions V OH 3.1  VI OH = –1 mA, VDD = 3.3 V Output Voltage V OL  50 mV I OL = 1 mA, VDD = 3.3 V I OH  –29 mA V OH = 1.0 V ...

  • Renesas HD151TS207SS - page 34

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 34 of 38 DC Electrical Characteristics / DO T Clock (CK409T Type3B Buffer) Ta = 0°C to 70°C, VD D = 3.3 V Item Symbol Min Typ *1 Max Unit Test Conditions V OH 3.1  VI OH = –1 mA, VDD = 3.3 V Output Voltage V OL  50 mV I OL = 1 mA, VDD = 3.3 V I OH  –29 mA V OH = 1.0 V Output Current ...

  • Renesas HD151TS207SS - page 35

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 35 of 38 DC Electrical Characteristics / REF Clock (CK409T Type5 Buffer) Ta = 0°C to 70°C, VD D = 3.3 V Item Symbol Min Typ *1 Max Unit Test Conditions V OH 3.1  VI OH = –1 mA, VDD = 3.3 V Output Voltage V OL  50 mV I OL = 1 mA, VDD = 3.3 V I OH  –33 mA V OH = 1.0 V Output Current I ...

  • Renesas HD151TS207SS - page 36

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 36 of 38 Clock Out tcycle n t = (tcycle n) - (tcycle n+1) CCS tcycle n+1 Fig.1 Cycle to Cycle Jitter (3.3 V Single Ended Clock Outp ut) Clock Outx Clock Outy 1.5 V tskS 1.5 V Fig.2 Output Cl ock Skew (3.3V Single Ended Cloc k Output) R P = 49.9 Ω R P = 49.9 Ω Z LT = Z LC = 50 Ω R S = 33.2 Ω CPU LT C ...

  • Renesas HD151TS207SS - page 37

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 37 of 38 Package Dimensions Unit : mm 0.10(0.004) 7.50 12 8 29 56 18.40 0.25 0.635 0.3 2.6 10.35 0.76 0.5 0˚– 8˚ 0.2 ...

  • Renesas HD151TS207SS - page 38

    HD151TS207SS Rev.1.00, Apr.25.2 003, page 38 of 38 Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or pr ...

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All of them are important, but the most important information from the point of view of use of the device are in the user manual Renesas HD151TS207SS.

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