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Fujitsu MB15F74UL - page 1
DS04-21374-1E FUJITSU SEMICONDUCT OR DA T A S H E E T ASSP Dual S erial Input PLL Frequenc y Synthesiz er MB15F74UL ■ DESCRIPTION The Fujitsu MB15F74UL is a serial input Phase Lock ed Loop (PLL) frequency synthesiz er with a 4000 MHz and a 2000 MHz prescalers. A 64/65 or a 128/129 f or the 4000 MHz prescaler, and a 32/33 or a 64/65 f or the 2000 ...
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Fujitsu MB15F74UL - page 2
MB15F74UL 2 (Continued) • Direct pow er saving function : P ower supply current in po wer sa ving mode T yp 0.1 µ A (V CC = Vp = 3.0 V, T a = + 25 ° C) Max 10 µ A (V CC = Vp = 3.0 V) • Software selectab le charge pump current : 1.5 mA/6.0 mA T yp • Dual modulus prescaler : 4000 MHz prescaler (64/65 or128/129) /2000 MHz prescaler (32/33 or ...
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Fujitsu MB15F74UL - page 3
MB15F74UL 3 ■ PIN DESCRIPTION Pin no. Pin name I/O Descriptions 1f i n IF I Prescaler input pin for the IF-PLL. Connection to an external VCO should be AC coupling. 2X f i n IF I Prescaler complimentary input for the IF-PLL section. This pin should be grounded via a capacitor. 3G N D IF Ground pin for the IF-PLL section. 4V CCIF Power sup ...
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Fujitsu MB15F74UL - page 4
MB15F74UL 4 ■ BLOCK DIA GRAM (9) Clock Data LE PS RF Xfin RF fin RF OSC IN fin IF PS IF V CCIF GND IF fp IF Do IF LD IF T1 T2 T1 T2 FC RF SW RF LDS Do RF OR LD / fout LD fr IF fr RF fp IF fp RF fr IF fr RF fp RF C N 1 C N 2 AND V CCRF GND RF Vp RF (19) ( ) (11) (17) (18) (12) (13) (10) (8) (7) (3) (4) (1) (5) (15) GND (20) (16) 14 Xfin IF (2) Vp ...
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Fujitsu MB15F74UL - page 5
MB15F74UL 5 ■ ABSOLUTE MAXIMUM RA TINGS W ARNING: Semiconductor de vices can be per manently damaged by application of stress (v oltage, current, temperature , etc.) in e xcess of absolute maximum ratings. Do not e xceed these ratings. ■ RECOMMENDED OPERA TING CONDITIONS Note : • V CCRF , Vp RF , V CCIF and Vp IF must supply equal v oltage. E ...
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Fujitsu MB15F74UL - page 6
MB15F74UL 6 * ■ ELECTRICAL CHARA CTERISTICS (V CC = 2.7 V to 3.6 V, T a = − 40 ° C to + 85 ° C) (Continued) P arameter Symbol Condition Va l u e Unit Min T yp Max Power supply current I CCIF *1 fin IF = 2000 MHz V CCIF = Vp IF = 3.0 V 2.1 2.5 3.2 mA I CCRF *1 fin RF = 2500 MHz V CCRF = Vp RF = 3.0 V 5.7 6.5 8.4 mA Power saving current I PSIF ...
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Fujitsu MB15F74UL - page 7
MB15F74UL 7 (Continued) (V CC = 2.7 V to 3.6 V, T a = − 40 ° C to + 85 ° C) *1 : Conditions ; f osc = 12.8 MHz, T a = + 25 ° C, SW = “L” in locking state. *2 : V CCIF = Vp IF = V CCRF = Vp RF = 3.0 V, f osc = 12.8 MHz, T a = + 25 ° C, in power sa ving mode. PS IF = PS RF = GND V IH = V CC , V IL = GND (at CLK, Data, LE) *3 : A C coupling. ...
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Fujitsu MB15F74UL - page 8
MB15F74UL 8 ■ FUNCTIONAL DESCRIPTION 1. Pulse swallo w function f VCO = [ (P × N) + A] × f OSC ÷ R f VCO : Output frequency of e xter nal voltage controlled oscillator (VCO) P : Preset divide ratio of dual modulus prescaler (32 or 64 f or IF-PLL, 64or 128 for RF-PLL) N : Preset divide ratio of binary 11-bit programmab le counter (3 to 2,047) A ...
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Fujitsu MB15F74UL - page 9
MB15F74UL 9 (2) Data setting • Binar y 14 - bit Programmab le Ref erence Counter Data Setting Note : Divide ratio less than 3 is prohibited. • Binar y 11 - bit Programmab le Counter Data Setting Note : Divide ratio less than 3 is prohibited • Binar y 7 - bit Swallow Counter Data Setting D i v i d e r a t i o R 1 4 R 1 3 R 1 2 R 1 1 R 1 0 R 9 ...
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Fujitsu MB15F74UL - page 10
MB15F74UL 10 • Prescaler Data Setting • Charge Pump Current Setting • LD / f out output Selectable Bit Setting • Phase Comparator Phase Switching Data Setting Z : High-impedance Depending upon the VCO and LPF polarity, FC bit should be set. Divide ratio SW = = = = “H” SW = = = = “L” Prescaler divide ratio IF-PLL 32/33 64/65 Prescale ...
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Fujitsu MB15F74UL - page 11
MB15F74UL 11 3. P ower Saving Mode (Intermittent Mode Contr ol Circuit) The inter mittent mode control circuit reduces the PLL pow er consumption. By setting the PS pin low, the de vice enters into the pow er saving mode, reducing the current consumption. See the Electrical Characteristics char t for the specific v alue. The phase detector output, ...
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Fujitsu MB15F74UL - page 12
MB15F74UL 12 4. Serial Data Data Input Timing Divide ratio is perf or med through a ser ial interf ace using the Data pin, Clock pin, and LE pin. Setting data is read into the shift register at the rise of the Clock signal, and transf erred to a latch at the rise of the LE signal. The f ollowing diagram sho ws the data input timing. LSB MSB Clock D ...
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Fujitsu MB15F74UL - page 13
MB15F74UL 13 ■ PHASE COMP ARA T OR OUTPUT W A VEFORM • LD Output Logic Notes : • Phase error detection range = − 2 π to + 2 π • Pulses on Do IF/RF signals during locking state are output to pre vent dead z one. • LD output becomes low when phase error is t WU or more . • LD output becomes high when phase error is t WL or less and co ...
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Fujitsu MB15F74UL - page 14
MB15F74UL 14 ■ TEST CIRCUIT (f or Measuring Input Sensitivity fin/OSC IN ) 1000 pF 1000 pF 1000 pF 1000 pF 0.1 µ F Vp RF V CCRF 50 Ω 50 Ω 50 Ω S.G. S.G. S.G. Vp IF V CCIF 0.1 µ F 0.1 µ F 0.1 µ F 1000 pF Controller (Divide ratio setting) Oscilloscope GND OSC IN Data Clock PS RF V CCRF GND RF Xfin RF LE fin RF 10 9 8 7 6 5 4 3 2 1 11 12 1 ...
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Fujitsu MB15F74UL - page 15
MB15F74UL 15 ■ TYPICAL CHARA CTERISTICS 1. fin input sensitivity 10 1000 1500 2000 2500 3000 3500 4000 4500 5000 5500 6000 V CC = 2.7 V V CC = 3.0 V V CC = 3.6 V SPEC 0 − 10 − 20 − 30 − 40 − 50 Pfin RF [dBm] fin RF [MHz] SPEC 10 0 500 1000 1500 2000 2500 3000 3500 V CC = 3.6 V V CC = 2.7 V V CC = 3.0 V SPEC fin IF [MHz] Pfin IF [dBm] 0 ...
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Fujitsu MB15F74UL - page 16
MB15F74UL 16 2. OSC IN input sensitivity V CC = 2.7 V V CC = 3.0 V V CC = 3.6 V SPEC 0 50 100 150 200 250 300 0 − 10 − 20 − 30 − 40 − 50 10 SPEC Input sensitivity vs. Input frequency Input frequency f OSC (MHz) Input sensitivity V OSC (dBm) ...
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Fujitsu MB15F74UL - page 17
MB15F74UL 17 3. RF-PLL Do output current • 1.5 mA mode • 6.0 mA mode V CC = Vp = 3.0 V 10.0 0 − 10.0 1.0 3.0 0.0 2.0 Charge pump output current I DO (mA) I DO − V DO Charge pump output voltage V DO (V) I DO − V DO Charge pump output current I DO (mA) Charge pump output voltage V DO (V) V CC = Vp = 3.0 V 10.0 0 − 10.0 1.0 3.0 0.0 2.0 ...
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Fujitsu MB15F74UL - page 18
MB15F74UL 18 4. IF-PLL Do output current • 1.5 mA mode • 6.0 mA mode I DO − V DO Charge pump output current I DO (mA) Charge pump output v oltage V DO (V) 10.0 0 − 10.0 1.0 3.0 V CC = Vp = 3.0 V 0.0 2.0 I DO − V DO Charge pump output current I DO (mA) Charge pump output v oltage V DO (V) V CC = Vp = 3.0 V 10.0 0 − 10.0 1.0 3.0 0.0 2.0 ...
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Fujitsu MB15F74UL - page 19
MB15F74UL 19 5. fin input impedance 866.25 Ω − 916.31 Ω 100 MHz 76.5 Ω − 319.2 Ω 500 MHz 31.078 Ω − 152.46 Ω 1 GHz 1 : 2 : 3 : START 100.000 000 MHz STOP 2 000.000 000 MHz 4 : 16.453 Ω− 46.539 Ω 2 000.000 000 MHz 1 3 2 4 35 336 Ω − 151.85 Ω 1 GHz 17.436 Ω − 52.191 Ω 2 GHz 20.211 Ω − 743.16 m Ω 3 GHz 1 : 2 : ...
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Fujitsu MB15F74UL - page 20
MB15F74UL 20 6. OSC IN input impedance OSC IN input impedance 15.882 k Ω − 11.652 k Ω 3 MHz 3.924 k Ω − 8.942 k Ω 10 MHz 286 Ω − 2.5913 k Ω 40 MHz 1 : 2 : 3 : START 3.000 000 MHz STOP 100.000 000 MHz 4 : 049.5 Ω− 1.0414 k Ω 100.000 000 MHz 1 2 3 4 ...
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Fujitsu MB15F74UL - page 21
MB15F74UL 21 ■ REFERENCE INFORMA TION ( for Lock - up Time , Phase Noise and Reference Leakage ) (Continued) Test Circuit S.G. OSC IN fin Do LPF VCO Spectrum Analyzer 7.5 k Ω 2.7 k Ω 15000 pF 1500 pF 330 pF V CC = 3.0 V Ta = + 25 ° C CP : 6 mA mode f VCO = 2500 MHz K V = 50 MHz/V fr = 200 kHz f OSC = 13 MHz LPF To VCO • PLL Ref erence Leak ...
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Fujitsu MB15F74UL - page 22
MB15F74UL 22 (Continued) 100.0050 MHz 2.00 kHz/div 99.99500 MHz 0 s 2.0000000 ms A Mkr x: 439.99764 µ s y: 50.0009 MHz 100.0050 MHz 2.00 kHz/div 99.99500 MHz 0 s 2.0000000 ms A Mkr x: 400.00146 µ s y: − 50.0013 MHz PLL Lock Up time 2500 MHz → 2550 MHz within ± 1 kHz L ch → H ch 440 µ s PLL Lock Up time 2550 MHz → 2500 MHz within ± 1 kH ...
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Fujitsu MB15F74UL - page 23
MB15F74UL 23 ■ APPLICA TION EXAMPLE 1000 pF 1000 pF 1000 pF 1000 pF 0.1 µ F 3.0 V 3.0 V 3.0 V 3.0 V 0.1 µ F 0.1 µ F 0.1 µ F 1000 pF GND OSC IN Data Clock PS RF V CCRF GND RF Xfin RF LE fin RF 10 9 8 7 6 5 4 3 2 1 11 12 13 14 15 16 17 18 19 20 LD/fout Do IF Do RF Vp RF Vp IF PS IF V CCIF GND IF Xfin IF fin IF MB15F74UL Lock Det. LPF VCO LPF VC ...
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Fujitsu MB15F74UL - page 24
MB15F74UL 24 ■ USA GE PRECA UTIONS (1) V CCRF , Vp RF , V CCIF and Vp IF must be equal v oltage. Ev en if either RF-PLL or IF-PLL is not used, power must be supplied to V CCRF , Vp RF , V CCIF and Vp IF to k eep them equal. It is recommended that the non-use PLL is controlled by po wer saving function. (2) T o protect against damage by electrosta ...
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Fujitsu MB15F74UL - page 25
MB15F74UL 25 ■ P A CKA GE DIMENSION 20-pad plastic BCC (LCC-20P-M05) Dimensions in mm ( inches ) C 2001 FUJITSU LIMITED C20056S-c-2-1 3.60±0.10(.142±.004) 11 16 16 11 16 1 6 3.40±0.10 (.134±.004) INDEX AREA 0.05(.002) 0.55±0.05 0.075±0.025 (Stand off) 0.25±0.10 (.010±.004) TYP 0.50(.020) 3.00(.118)TYP 2.80(.110)REF TYP 0.50(.020) (.010±. ...
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Fujitsu MB15F74UL - page 26
MB15F74UL FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incor ...
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