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Manuale per l’uso Cypress CY7C1320CV18

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Summary
  • Cypress CY7C1320CV18 - page 1

    18-Mbit DDR-II SRAM 2-W ord Burst Architecture CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-07160 Rev . *E Revised June 18, 2008 Features ■ 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 267 MHz clock for ...

  • Cypress CY7C1320CV18 - page 2

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 2 of 29 Logic Block Diagram (CY7C1316CV18) Logic Block Diagram (CY7C1916CV18) Wri te Reg Wri te Reg CLK A (19:0) Gen. K K Control Logic Address Register Read Add. Decode Read Data Reg. R/W Output Logic Reg. Reg. Reg. 8 16 8 NWS [1:0] V REF Write Add. Deco ...

  • Cypress CY7C1320CV18 - page 3

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 3 of 29 Logic Block Diagram (CY7C1318CV18) Logic Block Diagram (CY7C1320CV18) Wri te Reg Write Reg CLK A (19:0) Gen. K K Control Logic Address Register Read Add. Decode Read Data Reg. R/W Output Logic Reg. Reg. Reg. 18 36 18 BWS [1:0] V REF Write Add. Dec ...

  • Cypress CY7C1320CV18 - page 4

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 4 of 29 Pin Configuration The pin configuration for CY7C1316CV18, CY7C191 6CV18, CY7C1318CV18, and CY7C1320CV18 follo w . [1] 165-Ball FBGA (13 x 15 x 1 .4 mm) Pinout CY7C1316CV18 (2M x 8) 123456789 10 11 A CQ NC/72M A R/W NWS 1 K NC/144M LD A NC/36M CQ B ...

  • Cypress CY7C1320CV18 - page 5

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 5 of 29 CY7C1318CV18 (1M x 18) 123456789 10 11 A CQ NC/72M A R/W BWS 1 K NC/14 4M LD A NC/36M CQ B NC DQ9 NC A NC/288M K BWS 0 AN C N C D Q 8 C NC NC NC V SS AA 0A V SS NC DQ7 NC D NC NC DQ10 V SS V SS V SS V SS V SS NC NC NC E NC NC DQ1 1 V DDQ V SS V SS ...

  • Cypress CY7C1320CV18 - page 6

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 6 of 29 Pin Definitions Pin Name IO Pin Descripti on DQ [x:0] Input Output- Synchronous Dat a Input Output S ignals . Inputs are sampled on the rising edge of K and K clocks during valid write operations. These pins dri ve out t he requested data during a ...

  • Cypress CY7C1320CV18 - page 7

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 7 of 29 CQ Output Clock CQ Referenced with Respect to C . This is a free running clock and is synchronized to the input clock for output data (C) of the DDR-II. In single clock mo de, CQ is generated with resp ect to K. The timing for the echo clocks is s ...

  • Cypress CY7C1320CV18 - page 8

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 8 of 29 Functional Overview The CY7C1316CV18, CY7C1916CV18, CY7C1 318CV18, and CY7C1320CV18 are synchronous pi pelined Burst SRAMs equipped with a DDR interface, which operates with a read latency of one and half cycles when DOFF pin is tied HIGH. When DO ...

  • Cypress CY7C1320CV18 - page 9

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 9 of 29 driver impedance. The value of RQ must be 5x the value of th e intended line impedance d riven by the SRAM. The allo wable range of RQ to guarantee impe dance matching with a to lerance of ±15% is between 175 Ω an d 350 Ω , with V DD Q =1 . 5 V ...

  • Cypress CY7C1320CV18 - page 10

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 10 of 29 T ruth T able The truth table for the CY7C1316CV18, CY7C1916 CV18, CY7C13 18CV18, and CY7C1320CV18 fo llows. [2, 3, 4, 5, 6, 7] Operation K LD R/W DQ DQ Write Cycle: Load address; wait one cycle; input write data on consecutive K and K rising edg ...

  • Cypress CY7C1320CV18 - page 11

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 1 1 of 29 Write Cycle Descriptions The write cycle description t able for CY7C1 916CV18 follows. [2, 8] BWS 0 K K Comments L L–H – During the data portion of a write sequence, th e single byte (D [8:0] ) is written into the device. L – L–H During ...

  • Cypress CY7C1320CV18 - page 12

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 12 of 29 IEEE 1 149.1 Serial Boundary Scan (JT AG) These SRAMs incorporate a serial boundary scan T est Access Port (T AP) in the FBGA p ackage. This part is fully comp liant with IEEE S tandard #1 149.1 -2001. The T AP operates using JEDEC standard 1.8V ...

  • Cypress CY7C1320CV18 - page 13

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 13 of 29 IDCODE The IDCODE instruction loads a vendor-specific, 32-bi t code into the instruction re gister . It a lso places the instruction register between the TDI and TDO pins and shifts the IDCODE out of the device when the T AP controller enters the ...

  • Cypress CY7C1320CV18 - page 14

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 14 of 29 T AP Controller St ate Diag ram The state diagram for the T AP controller follows. [9] TEST -LOGIC RESET TEST -LOGIC / IDLE SELECT DR-SCAN CAPTURE-DR SHIFT -DR EXIT1-DR P AUSE-DR EXIT2-DR UPDA TE-DR 1 0 1 1 0 1 0 1 0 0 0 1 1 1 0 1 0 1 0 0 0 1 0 1 ...

  • Cypress CY7C1320CV18 - page 15

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 15 of 29 T AP Controller Block Diagram T AP Electrical Characteristics Over the Operating Range [10, 1 1, 12] Parameter Description T est Conditions Min Max Unit V OH1 Output HIGH V oltage I OH = − 2.0 mA 1.4 V V OH2 Output HIGH V oltage I OH = − 100 ...

  • Cypress CY7C1320CV18 - page 16

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 16 of 29 T AP AC Switching Characteristics Over the Operating Range [13, 14] Parameter Description Min Max Unit t TCYC TCK Clock Cycle Time 50 ns t TF TCK Clock Frequency 20 MHz t TH TCK Clock HIGH 20 ns t TL TCK Clock LOW 20 ns Setup Times t TMSS TMS Set ...

  • Cypress CY7C1320CV18 - page 17

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 17 of 29 Identification R egi ster Definitions Instruction Field Va l u e Description CY7C1316CV18 CY7C1916CV18 CY7 C1318CV18 CY7C1320CV18 Revision Numb er (31:29) 000 000 000 000 V ersion numbe r . Cypress Device ID (28:12) 1 10 10100010000101 1 10101000 ...

  • Cypress CY7C1320CV18 - page 18

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 18 of 29 Boundary Scan Order Bit # Bump ID Bit # Bump ID Bit # Bump ID Bit # Bum p ID 0 6R 28 10G 56 6A 84 2J 1 6 P2 9 9 G 5 7 5 B8 5 3 K 2 6N 30 1 1F 58 5A 86 3J 3 7P 31 1 1G 59 4A 87 2K 4 7 N3 2 9 F 6 0 5 C8 8 1 K 5 7R 33 10F 61 4B 89 2 L 6 8R 34 1 1E 6 ...

  • Cypress CY7C1320CV18 - page 19

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 19 of 29 Power Up Sequence in DDR-II SRAM DDR-II SRAMs must be power ed up and initialized in a predefined manner to prevent unde fined operations. Power Up Sequence ■ Apply power and drive DO FF either HIGH or LOW (all other inputs can be HIGH or LOW). ...

  • Cypress CY7C1320CV18 - page 20

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 20 of 29 Maximum Ratings Exceeding maximum ratin gs may impair the useful life o f the device. These user guidelines are not teste d. S torage T emperature ..................... ............ –65°C to +150°C Ambient T empe r at ur e with Power Appl i e ...

  • Cypress CY7C1320CV18 - page 21

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 21 of 29 I SB1 Automatic Power Down Current Max V DD , Both Ports Deselected, V IN ≥ V IH or V IN ≤ V IL f = f MAX = 1/t CYC , Inputs S tatic 267 MHz (x8) 305 mA (x9) 305 (x18) 315 (x36) 330 250 MHz (x8) 300 mA (x9) 300 (x18) 300 (x36) 320 200 MHz (x8 ...

  • Cypress CY7C1320CV18 - page 22

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 22 of 29 Cap acit ance T ested initially and after any design or process change that may affect these parameters. Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V DD = 1.8V , V DDQ = 1.5V 5 pF C CLK Clock ...

  • Cypress CY7C1320CV18 - page 23

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 23 of 29 Switching Characteristics Over the Operating Range [20, 21] Cypress Parameter Consor tium Parameter Description 267 MHz 250 MHz 200 MHz 167 MHz Unit Min Max Min Max Min Max Min Max t POWER V DD (T ypical) to the First Access [22] 1–1–1–1– ...

  • Cypress CY7C1320CV18 - page 24

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 24 of 29 Output T imes t CO t CHQV C/C Clock Rise (or K/K in single clock mode) to Data V alid – 0.45 – 0.45 – 0.45 – 0.50 ns t DOH t CHQX Data Output Hold af ter Output C/C Clock Rise (Active to Active) –0.45 – –0.45 – –0.45 – –0.50 ...

  • Cypress CY7C1320CV18 - page 25

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 25 of 29 Switching W aveforms Figure 5. Read/Write/Deselect Sequence [2 7, 28, 29 ] READ READ READ NOP NOP WRITE WRITE NOP 1 23 4 56 7 8 9 1 0 Q40 t KHCH t CO t t HC t t HA t SD t HD t KHCH t SD t HD DON’ T CARE UNDEFINED t CLZ t DOH t CHZ SC t KH t KHK ...

  • Cypress CY7C1320CV18 - page 26

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 26 of 29 Ordering Information Not all of the speed, package and temperature ranges are ava ilable. Please contact your local sales representative or visit www .cypress.com for actual products offered. Spee d (MHz) Ordering Code Package Diagram Package T y ...

  • Cypress CY7C1320CV18 - page 27

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 27 of 29 200 CY7C1316CV18-200BZC 51-85180 165-Ball Fine Pi tch Ball Grid Array (13 x 15 x 1.4 mm) Commercial CY7C1916CV18-200BZC CY7C1318CV18-200BZC CY7C1320CV18-200BZC CY7C1316CV18-200BZXC 5 1-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) ...

  • Cypress CY7C1320CV18 - page 28

    CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18 Document Number: 001-07160 Rev . *E Page 28 of 29 Package Diagram Figure 6. 165-Ball FBGA (13 x 15 x 1.4 mm), 51-85180 A 1 PIN 1 CORNER 15.00±0.10 13.00±0.10 7.00 1.00 Ø0.50 (165X) Ø 0 . 2 5MCAB Ø0.05 M C B A 0.15(4X) 0.35±0.06 SEATING PLANE 0.53±0.05 0.25 C 0.15 C PIN 1 CORNER TOP VIEW B ...

  • Cypress CY7C1320CV18 - page 29

    Document Number: 001-07160 Rev . *E Revised June 18, 2008 Page 29 of 29 QDR RAMs an d Quad Data Rate RAMs comp rise a new family of product s develope d by Cypress, IDT , NEC, Renesas, and Samsung. All pr oduct and co mpany nam es mentioned i n this documen t are the tr ad emarks of their respe ctive hold ers. CY7C1316CV18, CY7C1916CV18 CY7C1318CV1 ...

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Tutti sono importanti, ma le informazioni più importanti dal punto di vista di utilizzo del dispositivo possono essere trovate nel manuale per l’uso Cypress CY7C1320CV18.

Un gruppo di documenti denominato manuali per l’uso, è anche suddiviso in tipi più specifici, come: Manuali di installazione Cypress CY7C1320CV18, manuali di manutenzione, brevi manuali o manuali utente Cypress CY7C1320CV18. A seconda delle esigenze, si dovrebbe cercare il documento necessario. Nel nostro sito web, puoi visualizzare il manuale più popolare per l'uso del prodotto Cypress CY7C1320CV18.

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Il manuale per l’uso, denominato anche istruzioni per l’uso, o semplicemente il manuale è un documento tecnico progettato per aiutare ad utilizzare Cypress CY7C1320CV18 dagli utenti. I manuali sono di solito scritti da uno scrittore tecnico, ma in un linguaggio accessibile a tutti gli utenti Cypress CY7C1320CV18.

Il manuale per l’uso completo Cypress, dovrebbe includere vari elementi di base. Alcuni di loro sono meno importanti, come ad esempio: copertina / pagina del titolo o pagina di autore. Tuttavia, la parte rimanente, dovrebbe fornire informazioni importanti dal punto di vista dell'utente.

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5. FAQ - domande più frequenti
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