-
Fujitsu MB39A104 - page 1
DS04-27231-3E FUJITSU SEMICONDUCT OR DA T A S H E E T ASSP F or P o wer Management Applications (Gener al Pur pose DC/DC Con v er ter) 2-c h DC/DC Con ver ter IC with Over current Pr otection MB39A104 ■ DESCRIPTION The MB39A104 is a 2-channel DC/DC conv er ter IC using pulse width modulation (PWM), incor porating an ov ercurrent protection circui ...
-
Fujitsu MB39A104 - page 2
MB39A104 2 ■ PIN ASSIGNMENTS (TOP VIEW) (FPT-24P-M03) 1 2 3 4 5 6 7 8 9 10 11 12 VCCO : VH : OUT1 : VS1 : ILIM1 : DTC1 : VCC : CSCP : FB1 : − INE1 : CS1 : RT : 24 23 22 21 20 19 18 17 16 15 14 13 : CTL : GNDO : OUT2 : VS2 : ILIM2 : DTC2 : GND : VREF : FB2 : − INE2 : CS2 : C T ...
-
Fujitsu MB39A104 - page 3
MB39A104 3 ■ PIN DESCRIPTION Pin No. Symbol I/O Descriptions 1V C C O Output circuit power supply terminal (Connect to same potential as VCC pin.) 2 VH O Power supply terminal for FET drive circuit (VH = V CC − 5 V) 3 OUT1 O External Pch MOS FET gate drive terminal 4 VS1 I Overcurrent protection circuit input terminal 5I L I M 1 I Overcurre ...
-
Fujitsu MB39A104 - page 4
MB39A104 4 ■ BLOCK DIA GRAM − + + − + + − + + − + + − + + − + − + 10 VREF VREF 11 9 6 15 14 16 19 8 − INE1 CS1 FB1 DTC1 − INE2 CS2 FB2 DTC2 CSCP 12 13 18 17 RT CT GND VREF 24 7 23 2 20 21 22 5 4 3 1 CTL VCC GNDO VH ILIM2 VS2 OUT2 ILIM1 VS1 OUT1 VCCO 10 µ A 1.24 V 1.24 V (3.1 V) SCP Comp. SCP Logic UVLO OSC VREF Bias Voltage Cur ...
-
Fujitsu MB39A104 - page 5
MB39A104 5 ■ ABSOLUTE MAXIMUM RA TINGS * : The packages are mounted on the epo xy board (10 cm × 10 cm). W ARNING: Semiconductor de vices can be per manently damaged by application of stress (v oltage, current, temperature , etc.) in e xcess of absolute maximum ratings. Do not e xceed these ratings. ■ RECOMMENDED OPERA TING CONDITIONS * : See? ...
-
Fujitsu MB39A104 - page 6
MB39A104 6 ■ ELECTRICAL CHARA CTERISTICS (VCC = VCCO = 12 V, VREF = 0 mA, T a = + 25 ° C) (Continued) Parameter Symbol Pin No Conditions Va l u e Unit Min Typ Max 1.Reference voltage block [REF] Output v oltage V REF 17 Ta = + 25 ° C 4.95 5.00 5.05 V Output v oltage temperature va r i a t i o n ∆ V REF / V REF 17 Ta = 0 ° C to + 85 ° C ...
-
Fujitsu MB39A104 - page 7
MB39A104 7 (Continued) (VCC = VCCO = 12 V, VREF = 0 mA, T a = + 25 ° C) *: Standard design v alue. P arameter Symbol Pin No. Conditions Va l u e Unit Min T yp Max 8.Error amplifier bolck [Error Amp1, Error Amp2] F requency bandwidth BW 9, 16 A V = 0 dB 1.6* MHz Output v oltage V OH 9, 16 4.7 4.9 V V OL 9, 16 40 200 mV Output ...
-
Fujitsu MB39A104 - page 8
MB39A104 8 ■ TYPICAL CHARA CTERISTICS (Continued) Ta = + 25 ° C CTL = 5 V 10 8 6 4 2 0 0 5 10 15 20 Ta = + 25 ° C CTL = 5 V VREF = 0 mA 10 8 6 4 2 0 0 5 10 15 20 Ta = + 25 ° C VCC = 12 V CTL = 5 V 10 8 6 4 2 0 0 5 10 15 20 25 30 35 VCC = 12 V CTL = 5 V VREF = 0 mA 2.0 1.5 1.0 0.5 0.0 − 0.5 − 1.0 − 1.5 − 2.0 − 40 − 20 0 20 40 60 80 ...
-
Fujitsu MB39A104 - page 9
MB39A104 9 (Continued) Ta = + 25 ° C VCC = 12 V CTL = 5 V CT = 39 pF 10000 1000 100 10 CT = 100 pF CT = 220 pF CT = 560 pF 1 10 100 1000 Ta = + 25 ° C VCC = 12 V CTL = 5 V RT = 11 k Ω 10000 1000 100 10 RT = 24 k Ω RT = 68 k Ω RT = 130 k Ω 10 100 1000 1000 0 Ta = + 25 ° C VCC = 12 V CTL = 5 V RT = 47 k Ω 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 ...
-
Fujitsu MB39A104 - page 10
MB39A104 10 (Continued) − + + + 10 (15) 11 (14) 9 (16) IN OUT Error Amp1 (Error Amp2) 1 µ F 1.24 V 10 k Ω 2.4 k Ω 240 k Ω 10 k Ω 40 30 20 10 0 − 10 − 20 − 30 − 40 180 90 0 − 90 − 180 100 1 k 10 k 100 k 1 M 10 M Ta = + 25 ° C VCC = 12 V A V ϕ 1000 800 600 400 200 0 740 − 40 − 20 0 20 40 60 80 100 Error Amplifier, Gain, P ...
-
Fujitsu MB39A104 - page 11
MB39A104 11 ■ FUNCTIONS 1. DC/DC Con ver ter Functions (1) Reference v oltage bloc k (REF) The ref erence voltage circuit generates a temper ature-compensated reference v oltage (5.0 V T yp) from the v oltage supplied from the power supply terminal (pin 7). The voltage is used as the ref erence voltage f or the IC’ s inter nal circuitr y . The ...
-
Fujitsu MB39A104 - page 12
MB39A104 12 2. Contr ol Function When CTL ter minal (pin 24) is “L” le vel, IC becomes the standb y mode. The po wer supply current is 10 µ A (Max) at the standby mode . On/Off Setting Conditions 3. Pr otective Functions (1) Timer -latch o vercurrent pr otection circuit bloc k (OCP) The timer-latch ov ercurrent protection circuit is actuated u ...
-
Fujitsu MB39A104 - page 13
MB39A104 13 ■ SETTING THE OUTPUT V OL T A GE ■ SETTING THE TRIANGULAR OSCILLA TION FREQUENCY The triangular oscillation frequency is deter mined by the timing capacitor (C T ) connected to the CT ter minal (pin 13), and the timing resistor (R T ) connected to the R T ter minal (pin 12). Moreov er, it shifts more greatly than the caluculated v a ...
-
Fujitsu MB39A104 - page 14
MB39A104 14 ■ SETTING THE SOFT-ST ART AND DISCHARGE TIMES T o prev ent rush currents when the IC is tur ned on, you can set a soft-star t by connecting soft-star t capacitors (C S1 and C S2 ) to the CS1 ter minal (pin 11) f or channel 1 and the CS2 ter minal (pin 14) for channel 2, respectiv ely . When CTL ter minal (pin 24) goes to “H” le ve ...
-
Fujitsu MB39A104 - page 15
MB39A104 15 − + + 16 9 10 15 R1 R2 ( − INE2) CS1 (CS2) C S1 (C S2 ) − INE1 10 µ A FB1 (FB2) VREF V O Error Amp UVLO 1.24 V 11 14 L priority CH ON/OFF signal L : ON, H : OFF • Soft-Start Circuit ...
-
Fujitsu MB39A104 - page 16
MB39A104 16 ■ TREA TMENT WITHOUT USING CS TERMINAL When not using the soft-star t function, open the CS1 ter minal (pin 11) and the CS2 ter minal (pin 14) . 11 CS1 14 CS2 “OPEN” “OPEN” • Without Setting Soft - Start Time ...
-
Fujitsu MB39A104 - page 17
MB39A104 17 ■ ABOUT TIMER-LA TCH PRO TECTION CIRCUIT 1. Setting Timer -Latch Overcurrent Pr otection Detection Current The ov ercurrent protection circuit is actuated upon completion of the soft-star t period. When an ov ercurrent flows , the circuit detects the increase in the v oltage between the FET’ s drain and source using the e xter nal F ...
-
Fujitsu MB39A104 - page 18
MB39A104 18 Overcurrent Pr otection Circuit: Range of Operation When an ov ercurrent flow occurs, if the increased v oltage between the drain and source of the FET is detected by means of the e xter nal FET (Q1) resistor , oper ational stability is lost when the e xter n al FET (Q1) ON inter val deter mined by the oscillation frequency , input volt ...
-
Fujitsu MB39A104 - page 19
MB39A104 19 2. Setting Time Constant f or Timer -Latch Short-Circuit Pr otection Circuit Each channel uses the shor t-circuit detection comparator (SCP Comp .) to alwa ys compare the error amplifier ′ s output le vel to the ref erence voltage (3.1 V T yp). While DC/DC conv er ter load conditions are stable on all channels , the shor t-circuit det ...
-
Fujitsu MB39A104 - page 20
MB39A104 20 ■ TREA TMENT WITHOUT USING CSCP TERMINAL When not using the timer-latch shor t-circuit protection circuit, connect the CSCP ter minal (pin 8) to GND with the shor test distance. ■ RESETTING THE LA TCH OF EA CH PRO TECTION CIRCUIT When the ov ercurrent, or shor t-circuit protection circuit detects each abnor mality , it sets the latc ...
-
Fujitsu MB39A104 - page 21
MB39A104 21 ■ I/O EQUIV ALENT CIRCUIT 7 18 + − 1.24 V 17 VREF VCC GND 77.8 k Ω 24.8 k Ω CTL GND 72 k Ω 104 k Ω 24 CSX VCC GND VREF (5.0 V) RT GND (3.1 V) 12 + − 1.35 V VCC CSCP 2 k Ω GND VREF (5.0 V) 8 CT GND (3.1 V) 13 − INEX CSX GND VCC VREF (5.0 V) FBX 1.24 V ILIMX GND GNDO VCCO VSX VCC DTCX GND VCC FBX CT VCC GND VCCO VH GNDO ...
-
Fujitsu MB39A104 - page 22
MB39A104 22 ■ APPLICA TION EXAMPLE A B B + + A + + R10 R11 R9 68 k Ω 220 k Ω C16 0.1 µ F C12 1000 pF C14 1000 pF C21 1000 pF 150 k Ω 56 k Ω R15 R16 R14 68 k Ω 220 k Ω R13 C17 0.1 µ F 13 k Ω 100 k Ω R8 VIN (7 V to 19 V) R1 24 k Ω C1 100 pF C20 0.1 µ F C10 0.1 µ F R5 C6 10 µ F C8 82 µ F C7 10 µ F C11 0.1 µ F 2.7 k Ω Q2 L ...
-
Fujitsu MB39A104 - page 23
MB39A104 23 ■ P ART S LIST Note : T OSHIBA : T OSHIBA Cor p oration ROHM : ROHM Co ., Ltd SANY O : SANY O Electric Co ., Ltd. TDK : TDK Cor poration SUMID A : SUMID A Electric Co ., Ltd. ssm : SUSUMU Co ., Ltd. COMPONENT ITEM SPECIFICA TION VENDOR P ARTS No . Q1, Q2 Pch FET VDS = − 30 V, ID = − 6 A T OSHIBA TPC8102 D1, D2 Diode VF = 0.42 V (M ...
-
Fujitsu MB39A104 - page 24
MB39A104 24 ■ SELECTION OF COMPONENTS • Pch MOS FET The P-ch MOSFET f or s witching use should be rated f or at least 20% more than the maximum input voltage . T o minimize contin uity loss, use a FET with low R DS(ON) between the dr ain and source. F or high input voltage and high frequency operation, on/off-cycle s witching loss will be highe ...
-
Fujitsu MB39A104 - page 25
MB39A104 25 The abov e power dissipation figures f or the TPC8102 are satisfied with ample margin at 2.4 W (T a = + 25 ° C) . CH2 Input v oltage V IN (Max) = 19 V output voltage V O = 3.3 V, drain current I D = 3 A, Oscillation frequency f OSC = 500 kHz, L = 15 µ H, drain-source on resistance R DS (ON) : = 50 m Ω , tr = tf : = 100 ns. Drain cur ...
-
Fujitsu MB39A104 - page 26
MB39A104 26 The abov e power dissipation figures f or the TPC8102 are satisfied with ample margin at 2.4 W (T a = + 25 ° C) . • Inductors In selecting inductors, it is of course essential not to apply more current than the r ated capacity of the inductor , but also to note that the lo wer limit f or r ipple current is a critical point that if re ...
-
Fujitsu MB39A104 - page 27
MB39A104 27 Example: CH1 CH2 Inductance v alues der ived from the abo ve f or mulas are v alues that provide sufficient margin f or continuous operation at maxim um load current, but at which contin uous operation is not possible at light loads . It is therefore necessar y to deter mine the load lev el at which continuous operation becomes possib l ...
-
Fujitsu MB39A104 - page 28
MB39A104 28 T o deter mine whether the current through the inductor is within rated v alues, it is necessar y to determine the peak v alue of the r ipple current as well as the peak-to-peak v alues of the ripple current that affect the output ripple voltage . The peak v alue and peak-to-peak value of the ripple current can be deter mined by the f o ...
-
Fujitsu MB39A104 - page 29
MB39A104 29 • Flybac k diode The flyback diode is gener ally used as a Shottky barr ier diode (SBD) when the re verse v oltage to the diode is less than 40V . The SBD has the characteristics of higher speed in ter ms of f aster rev erse recov er y time, and low er f orw ard v oltage, and is ideal f or achieving high efficiency . As long as the DC ...
-
Fujitsu MB39A104 - page 30
MB39A104 30 • Smoothing Capacitor The smoothing capacitor is an indispensable element f or reducing r ipple voltage in output. In selecting a smooth- ing capacitor it is essential to consider equiv alent ser ies resistance (ESR) and allowab le r ipple current. Higher ESR means higher ripple voltage , so that to reduce ripple voltage it is necessa ...
-
Fujitsu MB39A104 - page 31
MB39A104 31 CH2 Capacitance v a lue CH1 CH2 Ripple current CH1 CH2 ESR ≤ ∆ V O − 1 ∆ I L 2 π fC L ≤ 0.033 − 1 0.364 2 π × 500 × 10 3 × 82 × 10 − 6 ≤ 86.8 m Ω C L ≥ ∆ I L 2 π f ( ∆ V O − ∆ I L × ESR) ≥ 0.491 2 π × 500 × 10 3 × ( 0 . 0 5 0 − 0.491 × 0.05) ≥ 6.14 µ F C L ≥ ∆ I L 2 π f ( ∆ V O − ...
-
Fujitsu MB39A104 - page 32
MB39A104 32 ■ REFERENCE D A T A (Continued) Vin = 7 V Vin = 10 V Vin = 19 V Vin = 12 V 100 90 80 70 60 50 40 30 10 m 100 m 1 10 Vin = 7 V Vin = 10 V Vin = 19 V Vin = 12 V 100 90 80 70 60 50 40 30 10 m 100 m 1 10 TOTAL efficiency η ( % ) Input voltage V IN (V) TOTAL Efficiency vs. Input Voltage Each CH efficiency η ( % ) Input voltage V IN (V) E ...
-
Fujitsu MB39A104 - page 33
MB39A104 33 (Continued) V G (V) 15 10 5 0 15 10 5 0 V S (V) t ( µ s) Ta = + 25 ° C VIN = 12 V CTL = 5 V V O = 5 V RL = 1.67 Ω 0123 4567 89 1 0 V G (V) 15 10 5 0 15 10 5 0 V S (V) t ( µ s) Ta = + 25 ° C VIN = 12 V CTL = 5 V V O = 3.3 V RL = 1.1 Ω 0123 4567 89 1 0 Switching Wave Form (CH1) Switching Wave Form (CH2) ...
-
Fujitsu MB39A104 - page 34
MB39A104 34 ■ USA GE PRECA UTION • • • • Printed cir cuit board gr ound lines should be set up with consideration for common impedance. • • • • T ake appropriate static electricity measures. • Containers f or semiconductor materials should ha v e anti-static protection or be made of conductive material. • After mounting, print ...
-
Fujitsu MB39A104 - page 35
MB39A104 35 ■ P A CKA GE DIMENSIONS 24-pin plastic SSOP (FPT-24P-M03) Note 1) *1 : Resin protrusion. (Each side : + 0.15 (.006) MAX) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. Dimensions in mm (inches ...
-
Fujitsu MB39A104 - page 36
MB39A104 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference ...
Fujitsu MB39A104についてご質問がありますか？
次のフォームを使用してください
見つけた説明書を読んでもFujitsu MB39A104の問題を解決できない場合、下記のフォームを使用して質問をしましょう。ユーザーのどなたかがFujitsu MB39A104で同様の問題を抱えていた場合、その解決方法を共有したいと考えるかもしれません。