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Cypress CY14E108N - page 1
ADVANCE CY14E108L, CY14E108N 8 Mbit (1024K x 8/512K x 16) nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-45524 Rev . *A Revised June 24, 2008 Features ■ 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 102 4K x 8 (CY14E108L) or 512K x 16 (CY14E108 ...
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Cypress CY14E108N - page 2
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 2 of 20 Pinout s Figure 1. Pin Diagram - 48 FBG A Figure 2. Pin Diagram - 44/54 TSOP II WE V CC A 11 A 10 V CAP A 6 A 0 A 3 CE NC NC DQ0 A 4 A 5 NC DQ2 DQ3 NC V SS A 9 A 8 OE V SS A 7 NC NC NC A 17 A 2 A 1 NC V CC DQ4 NC DQ5 DQ6 NC DQ7 NC A 15 A 14 A 13 A 12 HSB 3 2 6 5 4 1 D E ...
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Cypress CY14E108N - page 3
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 3 of 20 Pin Definitions Pin Name IO T yp e Description A 0 – A 19 Input Address Inputs Used to Select One of the 1,048,576 byte s of the nvSRAM for x8 Configuration . A 0 – A 18 Address Inputs Used to Select One of the 52 4, 288 bytes of the n vSRAM for x16 Configu ration . ...
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Cypress CY14E108N - page 4
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 4 of 20 Device Operation The CY14E108L/CY1 4E108N nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvola tile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is ...
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Cypress CY14E108N - page 5
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 5 of 20 Sof tware STORE T ran sfer data from the SRAM to the nonvolatile memory with a software address sequence. The CY14B108L/CY14B108N software STORE cycle is initiate d by executing sequential CE controlled READ cycles from six specific address locations in exact order . Du ...
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Cypress CY14E108N - page 6
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 6 of 20 Preventing AutoStore The AutoS t ore function is disabled by initiating an AutoS tore disable sequence. A sequence of read ope rations is performed in a manner similar to the software STORE initiation. T o initiate the AutoS tore disa ble sequence, the following sequenc ...
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Cypress CY14E108N - page 7
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 7 of 20 Maximum Ratin gs Exceeding maximum ratings may impair the useful life of the device. These user guid elines are not tested. S torage T emperature ................ ................. –65 ° C to +150 ° C Ambient T emperature with Power Applied ............ ... ... .... ...
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Cypress CY14E108N - page 8
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 8 of 20 AC T est Conditions Input Pulse Levels ..................... .............. ................. 0V to 3V Input Rise and Fall T imes (10% - 90%) ................... ..... <5 ns Input and Output T iming Reference Levels .................... 1.5V Cap acit ance In the foll ...
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Cypress CY14E108N - page 9
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 9 of 20 AC Switching Characteristics In the following table, the AC switching characteristics are listed. Parameters Description 20 ns 25 n s 45 ns Unit Cypress Parameters Alt Parameters Min Max Min Max Min Max SRAM Read Cycle t ACE t ACS Chip Enable Access T ime 20 25 45 ns t ...
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Cypress CY14E108N - page 10
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 10 of 20 AutoStore and Power Up RECALL Parameters Description CY14E1 08L/CY14E108N Unit Min Max t HRECALL [14] Power Up RECALL Duration 20 ms t STORE [15] ST ORE Cycle Duration 15 m s V SWITCH Low V oltage T rigger Level 4.4 V t VCCRISE VCC Rise T ime 150 μ s Sof tware Control ...
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Cypress CY14E108N - page 11
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 1 1 of 20 Figure 6. SRAM Read Cycle #2: CE and OE Controlled [10, 21, 23 ] Figure 7. SRAM Write Cycle #1: WE Cont rolled [13, 21, 22, 23 ] Switching W aveforms (continued) ADDRESS t RC CE t ACE t LZCE t PD t HZCE OE t DOE t LZOE DA T A V ALID ACTIVE ST ANDBY t PU DQ (DA T A OUT ...
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Cypress CY14E108N - page 12
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 12 of 20 Figure 8. SRAM Write Cycle #2: CE Controlled [13, 21, 22, 23] Figure 9. AutoStore or Power Up RECA LL [24] Note 24. Read and Write cycles are ignored during ST ORE, RECALL, and while VCC is below V SWITCH . Switching W aveforms (continued) t WC ADDRESS t SA t SCE t HA ...
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Cypress CY14E108N - page 13
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 13 of 20 Figure 10. CE Controlled Sof tware STORE/RECALL Cycle [17] Figure 1 1 . OE Controlled Software STOR E/ RE CALL Cycle [17] Switching W aveforms (continued) t RC t RC ADDRESS # 1 ADDRESS # 6 ADDRESS t AS t CW t GHAX t STORE / t RECALL DA T A V ALID DA T A V ALID HIGH IMP ...
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Cypress CY14E108N - page 14
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 14 of 20 Figure 12. Hardware STORE Cycle [20] Figure 13. Soft Sequence Processing [18, 19] Switching W aveforms (continued) t SS t SS [+] Feedback ...
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Cypress CY14E108N - page 15
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 15 of 20 Ordering Information Speed (ns) Ordering Code Package Diagram Package T yp e Operating Range 20 CY14E108L-ZS20XCT 51-85087 44-pin TSOP II Commercial CY14E108L-ZS20XIT 51-85087 44-pin TSOP II Industrial CY14E108L-ZS20XI 51-85087 44-pin TSOP II CY14E108L-BA20XCT 51-85128 ...
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Cypress CY14E108N - page 16
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 16 of 20 Part Numbering Nomenclature 45 CY14E108L-ZS45XCT 51-85087 44-pin TSOP II Commercial CY14E108L-ZS45XIT 51-85087 44-pin TSOP II Industrial CY14E108L-ZS45XI 51-85087 44-pin TSOP II CY14E108L-BA45XCT 51-85128 48-ball FBGA Commercial CY14E108L-BA45XIT 51-85128 48-ball FBGA ...
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Cypress CY14E108N - page 17
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 17 of 20 Package Diagrams Figure 14. 44-Pin TSOP II (51-85087) MAX MIN. DIMENSION IN MM (INCH) 11.938 (0.470) PLANE SEATING PIN 1 I.D. 44 1 18.517 (0.729) 0.800 BSC 0° -5° 0.400(0.016) 0.300 (0.012) EJECTOR PIN R G O K E A X S 11.735 (0.462) 10.058 (0.396) 10.262 (0.404) 1.19 ...
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Cypress CY14E108N - page 18
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 18 of 20 Figure 15. 48-ball FBGA - 6 mm x 10 mm x 1.2 mm (51-85128) Package Diagrams (continued) A 1 A1 CORNER 0.75 0.75 Ø0.30±0.05(48X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.21±0.05 1.20 MAX C SEATING PLANE 0.53±0.05 0.25 C 0.15 C A1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 3. ...
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Cypress CY14E108N - page 19
ADV ANCE CY14E108L, CY14 E108N Document Number: 001-45524 Rev . *A Page 19 of 20 Figure 16. 54-Pin TSOP II (51-85160) Package Diagrams (continued) 51-85160 -** [+] Feedback ...
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Cypress CY14E108N - page 20
Document Number: 001-45524 Rev . *A Revised June 24, 2008 Page 20 of 20 AutoS tore and QuantumT rap are registe red trademarks of Simtek Co rporation. All product s and company name s mentioned in this do c ument are the tr ademarks of thei r respective hol ders. ADVANCE CY14E108L, CY14E10 8N © Cypress Semiconducto r Corporation, 2008. The informa ...
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