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Cypress CY14E102N - page 1
ADVANCE CY14E102L, CY14E102N 2-Mbit (256K x 8/128K x 16) nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-45755 Rev . *A Revised June 27, 2008 Features ■ 15 ns, 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 256K x 8 (CY14E102L) or 128K x 16 (CY14 ...
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Cypress CY14E102N - page 2
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 2 of 21 Pinout s Figure 1. Pin Diagram - 48 FBGA (T op Vie w) Figure 2. Pin Diag ram - 44 TSOP II (T op View) WE V CC A 11 A 10 V CAP A 6 A 0 A 3 CE NC NC DQ0 A 4 A 5 NC DQ2 DQ3 NC V SS A 9 A 8 OE V SS A 7 NC NC NC A 17 A 2 A 1 NC V CC DQ4 NC DQ5 DQ6 NC DQ7 NC A 15 A 14 A 13 A 1 ...
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Cypress CY14E102N - page 3
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 3 of 21 Figure 3. Pin Diag ram - 54 TSOP II (T op View) Pinout s (continued) NC DQ7 DQ6 DQ5 DQ4 V CC DQ3 DQ2 DQ1 DQ0 NC A 0 A 1 A 2 A 3 A 4 A 5 A 6 A 7 V CAP WE A 8 A 10 A 11 A 12 A 13 A 14 A 15 A 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 3 ...
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Cypress CY14E102N - page 4
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 4 of 21 Device Operation The CY14E102L/CY1 4E102N nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvola tile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is t ...
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Cypress CY14E102N - page 5
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 5 of 21 Hardware RECALL (Power Up) During power up or after any low power condition (V CC <V SWITCH ), an internal RECALL re quest is latched. When V CC again exceeds the sense voltage of V SWITCH , a RECALL cycle is automatically initiated and takes t HRECALL to complete. So ...
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Cypress CY14E102N - page 6
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 6 of 21 Preventing AutoStore The AutoS t ore function is disabled by initiating an AutoS tore disable sequence. A sequence of read ope rations is performed in a manner similar to the software STORE initiation. T o initiate the AutoS tore disa ble sequence, the following sequence ...
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Cypress CY14E102N - page 7
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 7 of 21 Maximum Ratin gs Exceeding maximum ratings may impair the useful life of the device. These user guid elines are not tested. S torage T emperature ................ ................. –65 ° C to +150 ° C Ambient T emperature with Power Applied ............ ... ... ..... ...
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Cypress CY14E102N - page 8
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 8 of 21 AC T est Conditions Input Pulse Levels ......... .......................... ................. 0V to 3V Input Rise and Fall T imes (10% - 90%) ........ ................ <5 ns Input and Output T iming Reference Levels ........ ............ 1.5V Cap acit ance The followi ...
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Cypress CY14E102N - page 9
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 9 of 21 AC Switching Characteristics The following table lists the AC switching characteristics. Parameters Descrip tion 15 ns 20 ns 25 ns 45 ns Unit Cypress Parameters Alt Parameters Min Max Min Max Min Max Min Max SRAM Read Cycle t ACE t ACS Chip Enable Access Time 15 20 25 45 ...
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Cypress CY14E102N - page 10
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 10 of 21 AutoStore and Power Up RECALL Parameters Description CY14E10 2L/CY14E102N Unit Min Max t HRECALL [16] Power Up RECALL Duration 20 ms t STORE [17] ST ORE Cycle Duration 15 ms V SWITCH Low V oltage Trigger Level 4.4 V t VCCRISE VCC Rise T ime 150 μ s Sof tware Controlled ...
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Cypress CY14E102N - page 11
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 1 1 of 21 Switching W aveforms Figure 5. SRAM Read Cy cle #1: Address Controlled [12, 13, 23] Figure 6. SRAM Read Cycle #2: CE and OE Controlled [12, 23, 25 ] t RC t AA t OHA ADDRESS DQ (DA T A OUT) DA T A V ALID ADDRESS t RC CE t ACE t LZCE t PD t HZCE OE t DOE t LZOE DA T A V ...
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Cypress CY14E102N - page 12
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 12 of 21 Figure 7. SRAM Write Cycle #1: WE Cont rolled [13, 21, 22, 23] Figure 8. SRAM Write Cycle #2: CE Controlled [13, 21, 22, 23] Switching W aveforms (continued) t WC t SCE t HA t AW t SA t PWE t SD t HD t HZWE t LZWE ADDRESS CE WE DA T A IN DA T A OUT DA T A V ALID HIGH IM ...
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Cypress CY14E102N - page 13
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 13 of 21 Figure 9. AutoStore or Power Up RECA LL [26] Figure 10. CE Controlled Sof tware STORE/RECALL Cycle [19] Switching W aveforms (continued) V CC V SWITCH t STORE t STORE t HRECALL t HRECALL AutoStore POWER-UP RECALL Read & Write Inhibited STORE occurs only if a SRAM wr ...
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Cypress CY14E102N - page 14
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 14 of 21 Figure 1 1 . OE Controlled Software STOR E/ RE CALL Cycle [19] Figure 12. Hardware STORE Cycle [22] Figure 13. Soft Sequence Processing [20, 21] Switching W aveforms (continued) t RC t RC ADDRESS # 1 ADDRESS # 6 ADDRESS t AS t CW t GHAX t STORE / t RECALL DA T A V ALID ...
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Cypress CY14E102N - page 15
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 15 of 21 Ordering Information Speed (ns) Ordering Code Package Diagram Package T ype Operating Range 15 CY14B102L-ZS15XCT 51-85087 44-pin TSOP II Commercial CY14E102L-ZS15XIT 51-85087 44-pin TSOP II Industria l CY14E102L-ZS15XI 51-85087 44-pin TSOP II CY14E102L-BA15XCT 51-85128 ...
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Cypress CY14E102N - page 16
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 16 of 21 25 CY14E102L-ZS25XCT 51-85087 44-pin TSOP II Commercial CY14E102L-ZS25XIT 51-85087 44-pin TSOP II Industria l CY14E102L-ZS25XI 51-85087 44-pin TSOP II CY14E102N-BA25XCT 51-85128 48-ball FBGA Commercial CY14E102L-BA25XIT 51-85128 48-ball FBGA Industrial CY14E102L-BA25XI ...
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Cypress CY14E102N - page 17
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 17 of 21 Part Numbering Nomenclature Option: T - T ape & Reel Blank - S td. S peed: 20 - 20 ns 25 - 25 ns Data Bus : L - x8 N - x16 Density: 102 - 2 Mb V oltage: E - 5.0V Cypress NVSRAM 14 - Auto Store + Software Store + Hardware Store T empe rature: C - Commercia l (0 to 70 ...
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Cypress CY14E102N - page 18
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 18 of 21 Package Diagrams Figure 14. 44-Pin TSOP II MAX MIN. DIMENSION IN MM (INCH) 11.938 (0.470) PLANE SEATING PIN 1 I.D. 44 1 18.517 (0.729) 0.800 BSC 0° -5° 0.400(0.016) 0.300 (0.012) EJECTOR PIN R G O K E A X S 11.735 (0.462) 10.058 (0.396) 10.262 (0.404) 1.194 (0.047) 0. ...
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Cypress CY14E102N - page 19
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 19 of 21 Figure 15. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm Package Diagrams (continued) A 1 A1 CORNER 0.75 0.75 Ø0.30±0.05(48X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.21±0.05 1.20 MAX C SEATING PLANE 0.53±0.05 0.25 C 0.15 C A1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 3.75 5.25 B C ...
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Cypress CY14E102N - page 20
ADVANCE CY14E102L, CY14E10 2N Document Number: 001-45755 Rev . *A Page 20 of 21 Figure 16. 54-Pin TSOP II Package Diagrams (continued) 51-85160 -** [+] Feedback ...
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Cypress CY14E102N - page 21
Document Number: 001-45755 Rev . *A Revi se d June 27, 2008 Page 21 of 21 AutoS tore and QuantumT rap are registe red trademarks of Simtek Co rporation. All product s and company name s mentioned in this do c ument are the tr ademarks of thei r respective hol ders. ADVANCE CY14E102L, CY14E10 2N © Cypress Semiconducto r Corporation, 2008. The infor ...
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