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Manual Intel LPCI-7200S

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  • Intel LPCI-7200S - page 1

    NuDAQ ® / NuIPC ® PCI-7200 / cPCI-7200 / LPCI-7200S 12MB/S High Speed Digital Input/ Output Card User’s Guide Recycled Paper ...

  • Intel LPCI-7200S - page 2

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  • Intel LPCI-7200S - page 3

    ©Copyright 2003 ADLINK T echnology Inc. All Rights Reserved. Manual Rev. 2.30: October 13, 2003 Part No: 50-11102-101 The information in this document is subjec t to change without prior notice in order to improve reliabi lity, design, and fun ction and does not represen t a commitment on the part of the manufacturer. In no event will the manufact ...

  • Intel LPCI-7200S - page 4

    Getting Service from ADLINK Customer Satisfaction is top priority for ADLINK TECHNOLOGY INC. If you need any help or service, plea se contact us. ADLINK TECHNOLOGY INC. Web Site http://www.adlinktech.com Sales & Service Service@adlinktech.com TEL +886-2-82265877 FAX +886-2-82265717 Address 9F, No. 166, Jian Yi Road, Chungho City, Taipei, 235 Ta ...

  • Intel LPCI-7200S - page 5

    Table of Contents • i Table of Contents Chapter 1 Intr oduction ......................................... 1 1.1 Applications ......................................................................... 1 1.2 Features ............................................................................... 2 1.3 Specifications ................................. ...

  • Intel LPCI-7200S - page 6

    Table of Contents • ii 4.3 External Clock Mode ........................................................... 31 4.4 Handshaking ....................................................................... 31 4.5 Timing Charac teristic .......................................................... 33 Chapter 5 C/C++ Librarie s ............................... ...

  • Intel LPCI-7200S - page 7

    How to Use This Guide This manual is designe d to help user s use the PCI-7200, cPCI-7200, and LPCI-7200S. The functionalit y of PCI- 7200, cPCI-7200, an d LPCI-7200S are the same except that the cPCI-7200 has 4 auxiliary digita l inputs and outputs. In this guide, “PCI-7200” represents PCI-7200, cPCI -7200, and LPCI-72 00S if not specified. Th ...

  • Intel LPCI-7200S - page 8

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  • Intel LPCI-7200S - page 9

    Introduction • 1 1 Introduction The PCI-7200, cPCI-7200, and LPCI-7200S are PCI/CompactPCI/Lo w profile PCI form factor high-speed digital I/O ca rds, consisting of 32 digital input channels, and 32 digital output chann els. High performance desig n and state-of-the-art technology make this card suitable for high-speed digita l input and output a ...

  • Intel LPCI-7200S - page 10

    2 • Introduction 1.2 Features The PCI-7200 high-spe ed DIO Card provides the follo wing advanced features:  32 TTL digital input chann els  32 TTL digital output channel s  Transfer up to 12M Bytes per second  High output driving and lo w input loading  32-bit PCI bus, Plug and Play  On-board internal timer pacer clock  Inter ...

  • Intel LPCI-7200S - page 11

    Introduction • 3 z Input Voltage: Low: Min. 0V; Max. 0.8V High: Min. +2.0V z Input Load: Low: +0.5V @ -0.6mA max. High: +2.7V @ +20 µ A max. z Output Voltage: Low: Min. 0V; Max. 0.5V High: Min. +2.7V z Driving Capacity: Low: Max. +0.5V at 24mA (Sink) High: Min. 2.4V at -3.0mA (Source)  Programmable Counter z Device: 82C54-10, with a 4MHz time ...

  • Intel LPCI-7200S - page 12

    4 • Introduction 1.4 Software Supporting ADLINK provides versatile soft ware drivers and packages for users’ d ifferent approach to building a system. We not only provide programming li brary for many Windows systems, but also provide driv ers for many software packages including LabVIEW ® , HP VEE TM , DASYLab TM , InTouch TM , InControl TM , ...

  • Intel LPCI-7200S - page 13

    Introduction • 5 1.4.2 PCIS-LVIEW: LabVIEW ® Driver PCIS-LVIEW contains VIs to interface with NI’s LabVIEW ® software package. PCIS-LVIEW supports Windo ws 95/98/NT /2000. The LabVIEW ® drivers are shipped free with the board. Users can install and use them without a licen se. For detailed information about PCIS-LVIEW, pleas e refer to the u ...

  • Intel LPCI-7200S - page 14

    6 • Introduction 1.4.7 PCIS-ISG: ISaGRAF TM driver The ISaGRAF WorkBench is an IEC11 31-3 SoftPLC control progr am development environment. T he PCIS-ISG includes ADLINK products’ target drivers for ISaGRAF under the Windows NT environment. The PCIS-ISG is included on the ADLINK CD. It requires a license. 1.4.8 PCIS-ICL: InControl TM Driver PCI ...

  • Intel LPCI-7200S - page 15

    Installation • 7 2 Installation This chapter describes ho w to instal l the PCI-7200. Package c ontents and unpacking information are d escribed. Because the PCI-7200 is a P lug and Play device, there are no more jumper or DIP switch settings for configuration. The interrupt number and I/O port address are assigned by the system BIOS during syste ...

  • Intel LPCI-7200S - page 16

    8 • Installation 2.2 Unpacking The PCI-7200 card contains sensitiv e elec tronic components that can be easily damaged by static electricit y. The work area should have a grounde d ant i-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obviou ...

  • Intel LPCI-7200S - page 17

    Installation • 9 2.4 PCI-7200/cPCI-720 0/LPCI-7200S’s Layout CN1 PCI-72 00 Rev A1 CN2 ALTERA PCI -Bus Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 2.1(a) PCI-7200 La yo ut Diagram ...

  • Intel LPCI-7200S - page 18

    10 • Installation Figure 2.1(b) cPCI-7200 La yout Diagram ...

  • Intel LPCI-7200S - page 19

    Installation • 11 Figure 2.1(c) LPCI-7200S L ayout Diagram CN1B CN1A Dimension: mm ...

  • Intel LPCI-7200S - page 20

    12 • Installation Figure 2.1(d) LPCI-7200S wi th standard PCI bracket Layout Diag ram Dimension: mm ...

  • Intel LPCI-7200S - page 21

    Installation • 13 2.5 Hardware Installation Outline Hardware configuration These PCI cards (or CompactPCI, Low Profile PCI cards) are equipped with a Plug and Play PCI controller that requests base addr esses and interrupts according to PCI standard. The system BIOS will install the system resource based on the PCI cards’ configuration r egiste ...

  • Intel LPCI-7200S - page 22

    14 • Installation 2.6 Connector Pin Assignments 2.6.1 PCI-7200 Pin Assignmen ts The PCI-7200 comes equipped with one 37-pin D-Sub connector (CN2) located on the rear mounting plate a nd one 40-pin female flat cable header connector (CN1). The CN2 is located on the r ear mounting plate; the CN1 is on front of the board. Refer section 2.4 PCI-7200? ...

  • Intel LPCI-7200S - page 23

    Installation • 15 1 2 3 4 5 6 10 11 12 13 14 15 7 8 9 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 32 33 29 35 36 37 34 DI 1 DI 2 DI 3 DI 4 DI 5 DI 6 DI 7 DI 8 DI 1 0 DO 1 0 DO 1 1 DO 1 2 DO 1 3 DO 1 4 DO 1 5 DI 9 GN D I_TR G DO 0 DO 1 DO 2 DO 3 DO 4 DO 5 DO 6 DO 7 DO 8 DO 9 DI 0 DI 1 1 DI 1 2 DI 1 3 DI 1 4 DI 1 5 +5 V I_ACK I_R EQ Figure 2.3 CN2 ...

  • Intel LPCI-7200S - page 24

    16 • Installation 2.6.2 cPCI-7200 Pi n Assignments (1) (2) (3) (52) (53) (51) (48) (49) (50) (98) (99) (100) Figure 2.4 CN Pin Assignments (1) DO0 (26) O_TRG (51) DO1 (76) GND (2) DO2 (27) O_REQ (52) DO3 (77) GND (3) DO4 (28) O_ACK (53) DO5 (78) GND (4) DO6 (29) AUXIN2 (54) DO7 (79) AuxOut2 (5) DO8 (30) AUXIN3 (55) DO9 (80) AuxOut3 (6) DO10 (31) ...

  • Intel LPCI-7200S - page 25

    Installation • 17 2.6.3 LPCI-7200S Pin Assignments DIN0 A1 A35 GND DIN1 A2 A36 GND DIN2 A3 A37 GND DIN3 A4 A38 GND DIN4 A5 A39 GND DIN5 A6 A40 GND DIN6 A7 A41 GND DIN7 A8 A42 GND DIN8 A9 A43 GND DIN9 A10 A44 GND DIN10 A11 A45 GND DIN11 A12 A46 GND DIN12 A13 A47 GND DIN13 A14 A48 GND DIN14 A15 A49 GND DIN15 A16 A50 GND DIN16 A17 A51 GND DIN17 A18 ...

  • Intel LPCI-7200S - page 26

    18 • Installation DOUT0 B1 B35 GND DOUT1 B2 B36 GND DOUT2 B3 B37 GND DOUT3 B4 B38 GND DOUT4 B5 B39 GND DOUT5 B6 B40 GND DOUT6 B7 B41 GND DOUT7 B8 B42 GND DOUT8 B9 B43 GND DOUT9 B10 B 44 GND DOUT10 B11 B 45 GND DOUT11 B12 B 46 GND DOUT12 B13 B 47 GND DOUT13 B14 B 48 GND DOUT14 B15 B 49 GND DOUT15 B16 B 50 GND DOUT16 B17 B 51 GND DOUT17 B18 B 52 GN ...

  • Intel LPCI-7200S - page 27

    Installation • 19 2.7 8254 for Timer Pacer Generation Ti mer 0 Ti mer 1 Ti m er 2 CLK0 GATE0 OUT 0 CLK1 GATE1 CLK2 GATE2 OUT1 OUT2 8254 Ti m er/ Count er D igita l Inp ut T im e r P a ce r D igita l O u tp u t T im er P ac e r 4M H z C l ock “H ” “H ” “H ” Figure 2.7 8254 config uration The internal timer/counter 8254 on the PCI-7200 ...

  • Intel LPCI-7200S - page 28

    20 • Installation 2.8 LPCI-7200S PCI Bus Signaling Low-Profile PCI is a new PCI card standard for space-constrained s ystem designs. The new form factor maintain the same electric al protocols, PCI signals, and software drivers as standard PCI v2.2 expansio n cards. However, Low-Profile PCI bus interface only suppor ts 3.3V signa ling. To support ...

  • Intel LPCI-7200S - page 29

    Register Format • 21 3 Register Format 3.1 I/O Regis ters Format The PCI-7200 occupies 8 consec utiv e 32-bit I/O addresses in the PC I/O address space. The cPCI-7200 occupies 9 consecutive 32-bit I/O address es. Table 4.1 shows the I/O Map Address Read Write Base + 0 Counter 0 Counter 0 Base + 4 Counter 1 Counter 1 Base + 8 Counter 2 Counter 2 B ...

  • Intel LPCI-7200S - page 30

    22 • Register Format 3.2 Digital Input Register (BASE + 10) 32 digital input channels ca n be read from this register Address: BASE + 10 Attribute: REA D Only Data Format: Byte 7 6 5 4 3 2 1 0 Base +10 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 Base +11 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8 Base +12 DI23 DI22 DI21 DI20 DI19 DI18 DI17 DI16 Base +13 DI31 DI30 ...

  • Intel LPCI-7200S - page 31

    Register Format • 23  Digital Input Mode Setting: I_ACK : Input ACK Enable 1: Input ACK is enabled (input ACK will be asserted after inp ut data is read by CPU or written to input FIFO) 0: Input ACK is disabled I_REQ : Input REQ Strobe Enabled 1: Use I_REQ edge to latch input data 0: I_REQ is disabled I_TIME0 : Input Timer 0 Enable 1: Input is ...

  • Intel LPCI-7200S - page 32

    24 • Register Format O_TRG : Digital Output Trigger Signal This bit is used to control the O _TR G output of PCI-7200; the signal is on CN1 pin 36 of PCI-7200, CN1 pin 26 of cPCI-7200, CN2 pin 34 of LPCI 7200S when 1: O_TRG 1 goes High (1) 0: O_TRG 1 goes Low (0)  Digital I/O FIFO Status: I_OVR : Input data overrun 1: Digital Input FIFO is ful ...

  • Intel LPCI-7200S - page 33

    Register Format • 25 T0_EN: Interrupt is triggered by timer 0 output. 1: Timer 0 interrupt is enabled 0: Timer 0 interrupt is disabled T1_EN: Interrupt is triggered by timer 1 output. 1: Timer 1 interrupt is enabled 0: Timer 1 interrupt is disabled T2_EN: Interrupt is triggered by timer 2 output. 1: Timer 2 interrupt is enabled 0: Timer 2 interru ...

  • Intel LPCI-7200S - page 34

    26 • Register Format T1_T2: Timer 1 is cascaded with timer 2 1: Timer 1 and timer 2 are cascad ed together; output of timer 2 connects to the clock input of timer 1. 0: Not cascaded, the 4MHz clock is connected to the timer 1 clock input.  I_REQ Polarity Selection: When the input sampling is controlled by the I_REQ signal only, the I_REQ can b ...

  • Intel LPCI-7200S - page 35

    Register Format • 27 3.6 8254 Timer Registers (BASE + 0) The 8254 timer/counter IC occ upies 4 I/O address. Users can refer to Tundra's or Intel's data sheet for a full descrip tion of the 8254 f eatures. Download the 8254 data sheet from the following web site: http://support.intel.com/support/controlle rs/peripheral/231164.htm or http ...

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  • Intel LPCI-7200S - page 37

    Operation Theory • 29 4 Operation Theory In PCI-7200, there are four data transfer modes can be used for dig ital I/O access and control, these modes are: 1. Direct Program Control : the digital inputs and outputs can be read/written and controlled by its correspo nding I/O port address directly. 2. Internal Timer Pacer Mode : the digital input a ...

  • Intel LPCI-7200S - page 38

    30 • Operation Theory 4.2 Time r Pacer Mode The digital I/O access control is clocked by timer pacer, which is generated by an interval programming timer/counter chip (825 4). There are three timers on the 8254. Timer 0 is used to generate timer pacer for dig ital input and timer 1 is used for digital output. The configur ation is illustrated as ...

  • Intel LPCI-7200S - page 39

    Operation Theory • 31 4.3 External Cloc k Mode The digital input is clocked b y external strobe, which is from Pin 19 (I_REQ) of CN2 (PCI-7200), Pin 24 of CN1 (cPCI-720 0), or PIN 33 of C N1A (LPCI-7200S). The operation sequ ence is very similar to the T imer Pacer Trigger. T he only difference is the clock source. 1. The external input strobe is ...

  • Intel LPCI-7200S - page 40

    32 • Operation Theory O_REQ & O_ACK for Digital Output 1. Digital Output Data is moved from PC memory to FIFO of PCI-7200 by using DMA data mastering data transfer. 2. Move output data from FIFO to digital output circuit. 3. Output data is ready. 4. An O_REQ signal is generate d and sent to outside device. 5. After an O_ACK is captured, steps ...

  • Intel LPCI-7200S - page 41

    Operation Theory • 33 4.5 Timing Charac teristic 1. I_REQ as input data strobe (Rising Edge Active) t h ≥ 60ns t I ≥ 60ns t CYC ≥ 5 PCI CLK Cycle t s ≥ 2ns t n ≥ 30ns 2. I_REQ as input data strobe (Falling Edge Active) t s valid data D10~DI31 t n valid data IN_R I_REQ t cyc t l t h t h ≥ 60ns t I ≥ 60ns t CYC ≥ 5 PCI CLK Cycle t s ...

  • Intel LPCI-7200S - page 42

    34 • Operation Theory 3. I_REQ & I_ACK Handshaking valid data D10~DI31 valid data t1 t2 t5 t4 t3 IN I_REQ IN I_ACK t 1 ≥ 0ns t 5 ≥ 60ns t 3 ≥ 2 PCI CLK Cycle t 2 ≥ 0ns t 4 ≥ 1 PCI CLK Cycle Note: I_REQ must be asserted until I_ACK asserts, I_ACK wi ll be asserted until I_REQ de-asserts. 4. O_REQ as output data strobe Out O_REQ t cyc ...

  • Intel LPCI-7200S - page 43

    Operation Theory • 35 5. O_REQ & O_ACK Handshaking OUT_REQ t 1 t 3 valid data DO0~Do31 t 1 19ns t 3 t 2 1 PCI CLK Cycle OUT_ACK 5 PCI CLK Cycle valid data t 2 Note: O_ACK must be de-asserte d before O_REQ asserts, O_ACK can be asserted any time after O_REQ a sserts, O_REQ will be reasserted after O_ACK is asserted. O_REQ O_ACK ...

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  • Intel LPCI-7200S - page 45

    C/C++ Libraries • 37 5 C/C++ Libraries This chapter describes the soft ware library for operating the card. Only functions in DOS library and Windows 95 DLL are describ ed. Please refer to the PCIS-DASK function reference manual, which included on the ADLINK CD, for the descriptions of the Wi ndows 98/NT/2000 DL L functions. The function prototyp ...

  • Intel LPCI-7200S - page 46

    38 • C/C++ Libraries 5.2 Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software drivers use full-names to represent t he functions' real meaning. T he naming convention rules are: In DOS: _{hardware_model }_{action_name}. e.g . _7200_Initial() . All functions in the PCI-7200 drive ...

  • Intel LPCI-7200S - page 47

    C/C++ Libraries • 39 5.3 _7200_Initial @ Description A PCI-7200 card is initialized according to the card num ber. Because the PCI-7200 is PCI bus arch itectur e and meets the Plug and Play design, the IRQ and base_ad dress (pass-through addres s) are assigned by system BIOS directly. Every PCI-7200 card has to be in itialized by this function be ...

  • Intel LPCI-7200S - page 48

    40 • C/C++ Libraries 5.4 _7200_Switch_Card_No @ Description After initializing more than one PCI-7200 c ard, this function is used to select which card is currently used. @ Syntax Visual C++ (Windows 95) int W_7200_Switch_Card_No (U8 card_number) Visual Basic (Windows 95) W_7200_Switch_Card_No (ByVal card_number As Byte) As Long C/C++ (DOS) int _ ...

  • Intel LPCI-7200S - page 49

    C/C++ Libraries • 41 5.6 _7200_AUX_DI_Channel @ Description Read data from the auxiliar y digital in put ch annel of cPCI-7200 card. There are 4 digital input channels o n the cP CI-7200 auxiliar y digital input port. When performing this function, the auxiliar y digital input port is read and the value of the corresponding chann el is returned. ...

  • Intel LPCI-7200S - page 50

    42 • C/C++ Libraries 5.8 _7200_AUX_DO_Channel @ Description Write data to auxiliar y digital output chan nel (bit). There are 4 auxiliary di gital output channels on the cPCI -7200. W hen performing thi s function, the digital output data is written to the corresponding c hannel. * channel means each bit of digital input port @ Syntax Visual C++ ...

  • Intel LPCI-7200S - page 51

    C/C++ Libraries • 43 5.10 _7200_DI_Channel @ Description This function is used to read data from digital input channels (bit). There are 32 digital input channels on the PCI-7200. When performs this function, the digital input port is read and the va l ue of the corresponding c hannel is returned. * channel means each bit of digital input port. @ ...

  • Intel LPCI-7200S - page 52

    44 • C/C++ Libraries 5.12 _7200_DO_Channel @ Description This function is used to write data to di gital output channels (bit). There are 32 digital output channels on the PCI- 7200. When performing this function, the digital output data is written to the corresponding channel. * channel means each bit of digital input port @ Syntax Visual C++ (W ...

  • Intel LPCI-7200S - page 53

    C/C++ Libraries • 45 5.13 _7200_Alloc_DMA_Mem @ Description Contact Windows 95/98 system to alloca t e a block of contiguous memory for single-buffered DMA transfer. This function is only available in Windows 95/98. @ Syntax Visual C++ (Windows 95) int W_7200_Alloc_DMA_Mem (U32 *buff, U32 *handle, U32 buf_size, U32 *actual_size) Visual Basic (Win ...

  • Intel LPCI-7200S - page 54

    46 • C/C++ Libraries 5.14 _7200_Free_DMA_Mem @ Description Releases system DMA memory. This function is onl y available in Windows 95/98. @ Syntax Visual C++ (Windows 95) int W_7200_Free_DMA_Mem (U32 handle) Visual Basic (Windows 95) W_7200_Free_DMA_Mem (ByVal handle As Long ) As Long @ Argument handle: The handle of system DMA memory to release. ...

  • Intel LPCI-7200S - page 55

    C/C++ Libraries • 47 denotes the actual size of allocated me mory for each ha lf of circular buffer. @ Return Code ERR_NoError ERR_SmallerDMAMemAllocated 5.16 _7200_Free_DBDMA_Mem @ Description Releases a system’s circular buffer DMA memory. This function is only available in Windo ws 95/98. For double-buffered transfer princi ple, please refer ...

  • Intel LPCI-7200S - page 56

    48 • C/C++ Libraries Bus Mastering DMA mode of the PCI-7200: PCI bus mastering offers the highest possible s peed available on t he PCI-7200. When the function _7200_DI_DMA _Start is executed, it will enable PCI bus master operation. This is conceptuall y similar to DMA (Direct Memory Access) transfers in a PC but it is really PCI bus masteri ng. ...

  • Intel LPCI-7200S - page 57

    C/C++ Libraries • 49 @ Syntax Visual C++ (Windows 95) int W_7200_DI_DMA_Start (U8 mode, U32 count, U32 handle, Boolean wait_trg, U8 trg_pol, Boolean clear_fifo, Boolean disable_di) Visual Basic (Windows 95) W_7200_DI_DMA_Start (ByVal mode As Byte, ByVal count As Long, ByVal handle As Long, ByVal wait_trg as Byte, ByVal trg_pol As Byte, ByVal clea ...

  • Intel LPCI-7200S - page 58

    50 • C/C++ Libraries clear_fifo: 0: retain the FI FO data 1: clear FI FO data before perform digital inpu t disable_di: 0: digit al input operation still active after DMA transfer complete 1: disable d igital input operation immed iately when DMA transfer complet e @ Return Code ERR_NoError ERR_BoardNoInit ERR_InvalidDIOMode ERR_InvalidDIOCnt ERR ...

  • Intel LPCI-7200S - page 59

    C/C++ Libraries • 51 5.19 _7200_DI_DMA_Stop @ Description This function is used to stop t he DMA data transferring. After executing this function, the _7200_DI_DMA_Start functi on is stopped. The function returns the number of the data which has been tr an sferred, no matter if the digital input DMA data transfer is stopp ed by this function or b ...

  • Intel LPCI-7200S - page 60

    52 • C/C++ Libraries 5.21 _7200_CheckHalfReady @ Description When you use _7200_ DI_DMA_Start to sample digital input data and double buffer mode is set as enable. User s must use _7200_CheckHalfRead y to check data re ady (data half full) or not in the circular buffer, and using _7200_D blBufferTransfer to get data. @ Syntax Visual C++ (Windows ...

  • Intel LPCI-7200S - page 61

    C/C++ Libraries • 53 5.23 _7200_GetOverrunStatus @ Description When using _7200_DI_ DMA_Start to convert Digital I/O data with double buffer mode enabled, and not using _7200_DblBufferTransfer to move converted data then double buffer overrun will occur. Use this function to check overrun count. @ Syntax Visual C++ (Windows 95) int W_7200_GetOver ...

  • Intel LPCI-7200S - page 62

    54 • C/C++ Libraries C/C++ (DOS) int _7200_DO_DMA_Start (U8 mode, U32 count, U32 *do_buffer, Boolean repeat) @ Argument mode: Digital output trigger modes DO_MODE_0: Internal timer pacer (TIME 1) DO_MODE_1: Internal timer pacer with O_REQ enable DO_MODE_2: O_REQ & I_REQ handshaking count: the sample number of digital output dat a (in samples, ...

  • Intel LPCI-7200S - page 63

    C/C++ Libraries • 55 C/C++ (DOS) int _7200_DO_DMA_Status (U8 *status , U32 *count) @ Argument status: status of the DMA data transfer. 0: DO_DMA_STOP: DMA is completed 1: DO_DMA_RUN: DMA is not completed count: the amount of DO data wh ich has been transferred. @ Return Code ERR_NoError 5.26 _7200_DO_DMA_Stop @ Description This function is used t ...

  • Intel LPCI-7200S - page 64

    56 • C/C++ Libraries 5.27 _7200_DI_Timer @ Description This function is used to set the intern al timer pacer for digital input. T here are two configurations for the internal timer pacer: 1. Non-cascaded (One COUNT ER 0 only) Counter 0 CLK0 GATE0 OUT0 8254 Timer/Counter 4MHz Input Digital Input Trig g Timer pacer frequency = 4Mhz / C0 2. Cascade ...

  • Intel LPCI-7200S - page 65

    C/C++ Libraries • 57 mode: TIMER_NONCASCADE or TIMER_CASCADE @ Return Code ERR_NoError ERR_InvalidBoardNumber ERR_InvalidTimerMode ERR_BoardNoInit 5.28 _7200_DO_Timer @ Description This function is used to set the internal timer pacer for digital output. There are two configurations for the internal timer pacer: 1. Non-cascaded (One COUNT ER 0 on ...

  • Intel LPCI-7200S - page 66

    58 • C/C++ Libraries @ Syntax Visual C++ (Windows 95) int W_7200_DO_Timer (U16 c1, U16 c2, Booelan mode) Visual Basic (Windows 95) W_7200_DO_Timer (ByVal c1 As Integer, ByVal c2 As Integer, ByVal mode As Byte) As Long C/C++ (DOS) int _7200_DO_Timer (U16 c1, U16 c2, Boolean mode) @ Argument c1 : frequency divider of Counter #1 c2 : frequency divid ...

  • Intel LPCI-7200S - page 67

    Double Buffer Mode Principle • 59 6 Double Buffer Mode Principle The data buffer for a double-buffered DMA DI operation is logically a circ ular buffer divided into two equal halves. T he double-buffered DI begins when the device starts writing data into the first hal f of the circular buffer (Figure 6-1a). After device begins writing to the seco ...

  • Intel LPCI-7200S - page 68

    60 • Double Buffer Mode Principle The PCI-7200 double buffer mode functions were designed according to the principle described above. If using _720 0_DblBufferMode() to enable doub le buffer mode, _7200_DI_DMA_Start() will perform double-b uffered DMA DI. Call _7200_CheckHalfRea dy() to check if data in the circular buffer is half-full and ready ...

  • Intel LPCI-7200S - page 69

    Limitations • 61 7 Limitations The 12MB/sec data transfer rate can onl y be possi bly achieved in s ystems where the PCI-7200 card is the on ly device using the bus, but the speed can not be guaranteed due to the limited FIF O depth. The PCI-7200 supports three input clock modes, internal clock, external clock, and handshaking modes. T he first t ...

  • Intel LPCI-7200S - page 70

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  • Intel LPCI-7200S - page 71

    Product Warranty/Serv ice • 63 Warranty Policy Thank you for choosing ADLI NK. To understand your rig hts and enjoy all the after-sales services we offer, please read the following car efully: 1. Before using ADLINK’s products pl ease read the user manual an d follow the instructions exactly. 2. When sending in damaged products for repair, plea ...

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A complete Intel manual, should contain several basic components. Some of them are less important, such as: cover / title page or copyright page. However, the remaining part should provide us with information that is important from the point of view of the user.

1. Preface and tips on how to use the manual Intel LPCI-7200S - At the beginning of each manual we should find clues about how to use the guidelines. It should include information about the location of the Contents of the Intel LPCI-7200S, FAQ or common problems, i.e. places that are most often searched by users in each manual
2. Contents - index of all tips concerning the Intel LPCI-7200S, that we can find in the current document
3. Tips how to use the basic functions of the device Intel LPCI-7200S - which should help us in our first steps of using Intel LPCI-7200S
4. Troubleshooting - systematic sequence of activities that will help us diagnose and subsequently solve the most important problems with Intel LPCI-7200S
5. FAQ - Frequently Asked Questions
6. Contact detailsInformation about where to look for contact to the manufacturer/service of Intel LPCI-7200S in a specific country, if it was not possible to solve the problem on our own.

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