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Manual Cypress CY7C1347G

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  • Cypress CY7C1347G - page 1

    CY7C1347G 4-Mbit (128K x 36) Pipelined Sync SRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 38-05516 Rev . *F Revised January 15, 2009 Features ■ Fully registered inputs and outputs for pipelined operation ■ 128K x 36 comm on IO arc hitecture ■ 3.3V core power supply (V ...

  • Cypress CY7C1347G - page 2

    CY7C1347G Document #: 38-05516 Rev . *F Page 2 of 22 Block Diagram ADDRESS REGISTER ADV CLK BURST COUNTER AND LOGIC CLR Q1 Q0 ADSP ADSC MODE BWE GW CE 1 CE 2 CE 3 OE ENABLE REGISTER OUTPUT REGISTERS SENSE AMPS OUTPUT BUFFERS E PIPELINED ENABLE INPUT REGISTERS A 0, A1, A BW B BW C BW D BW A MEMORY ARRAY DQs DQP A DQP B DQP C DQP D SLEEP CONTROL ZZ A ...

  • Cypress CY7C1347G - page 3

    CY7C1347G Document #: 38-05516 Rev . *F Page 3 of 22 Pinout s A A A A A 1 A 0 NC/72M NC/36M V SS V DD NC/18M NC/9M A A A A A A A DQP B DQ B DQ B V DDQ V SSQ DQ B DQ B DQ B DQ B V SSQ V DDQ DQ B DQ B V SS NC V DD ZZ DQ A DQ A V DDQ V SSQ DQ A DQ A DQ A DQ A V SSQ V DDQ DQ A DQ A DQP A DQP C DQ C DQ C V DDQ V SSQ DQ C DQ C DQ C DQ C V SSQ V DDQ DQ C ...

  • Cypress CY7C1347G - page 4

    CY7C1347G Document #: 38-05516 Rev . *F Page 4 of 22 Pinout s (continued) 2 34 5 6 7 1 A B C D E F G H J K L M N P R T U V DDQ NC/288M NC/144M DQP C DQ C DQ D DQ C DQ D AA A A ADSP V DDQ CE 2 A DQ C V DDQ DQ C V DDQ V DDQ V DDQ DQ D DQ D NC NC V DDQ V DD CLK V DD V SS V SS V SS V SS V SS V SS V SS V SS NC/576M NC/1G NC NC NC NC NC NC NC/36M NC/72M ...

  • Cypress CY7C1347G - page 5

    CY7C1347G Document #: 38-05516 Rev . *F Page 5 of 22 T ab le 1. Pin Definitions Name IO Description A 0 ,A 1 ,A Input- Synchronous Address Input s Used to Select One of the 128K Address Locations . Sampled at the rising ed ge of the CLK if ADSP or ADSC is active LOW , and CE 1 , CE 2 , and CE 3 are sampled active. A [1: 0] feeds the 2-bit counter . ...

  • Cypress CY7C1347G - page 6

    CY7C1347G Document #: 38-05516 Rev . *F Page 6 of 22 Functional Overview All synchronous inputs pass through input registe rs controlled by the rising edge of the clock. All data outputs pass through output registers controlled by th e ri sing ed ge of the clock. Maximum access delay from the clock rise (t CO ) is 2.6 ns (250 MHz device). The CY7C1 ...

  • Cypress CY7C1347G - page 7

    CY7C1347G Document #: 38-05516 Rev . *F Page 7 of 22 T able 2. Interleaved Burst Sequence First Address Second Address Thir d Address Fourth Address A [1:0] A [1:0] A [1:0] A [1:0] 00 01 10 1 1 01 00 1 1 10 10 1 1 00 01 1 1 10 01 00 T able 3. Linear Burst Seq uence First Address Second Address Third Address Fourth Address A [1:0] A [1:0] A [1:0] A ...

  • Cypress CY7C1347G - page 8

    CY7C1347G Document #: 38-05516 Rev . *F Page 8 of 22 Write Cycle, Conti nue Burst Next X X X L H H L L X L-H D Write Cycle, Conti nue Burst Next H X X L X H L L X L-H D Read Cycle, Suspend Burst Curre nt X X X L H H H H L L-H Q Read Cycle, Suspend Burst Curre nt X X X L H H H H H L-H T ri-S tate Read Cycle, Suspend Burst Curre nt H X X L X H H H L ...

  • Cypress CY7C1347G - page 9

    CY7C1347G Document #: 38-05516 Rev . *F Page 9 of 22 Maximum Ratin gs Exceeding the maximum ratings may shorten the battery life of the device. User gui d el i n es ar e not tested. S torage T emperature ... ......... ......... ........... ..... − 65 ° C to +150 ° C Ambient T emperature with Power Applied .......... ......... ........ ......... ...

  • Cypress CY7C1347G - page 10

    CY7C1347G Document #: 38-05516 Rev . *F Page 10 of 22 I SB3 Automatic CE Power Down Current—CMOS Inputs Max. V DD , Device Dese lected, or V IN < 0.3V or V IN > V DDQ – 0.3V f = f MAX = 1/t CYC 4 ns cycle, 250 MHz 105 mA 5 ns cycle, 200 MHz 95 mA 6 ns cycle, 166 MHz 85 mA 7.5 ns cycle, 133 MHz 75 m A I SB4 Automatic CE Power Down Current? ...

  • Cypress CY7C1347G - page 11

    CY7C1347G Document #: 38-05516 Rev . *F Page 1 1 of 22 Switching Characteristics Over the Operatin g Range [14, 15 ] Parameter Description –250 –200 –166 –133 Unit Min Max Min Max Min Ma x Min Max t POWER V DD (T ypical) to the first Access [10] 11 1 1 m s Clock t CYC Clock Cycle T i me 4.0 5.0 6.0 7.5 ns t CH Clock HIGH 1.7 2.0 2.5 3.0 ns ...

  • Cypress CY7C1347G - page 12

    CY7C1347G Document #: 38-05516 Rev . *F Page 12 of 22 Switching W aveforms Figure 5. Read Cycle Timing [16] t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A1 t CEH t CES GW, BWE, BW [A:D] D ata Out (Q) High-Z t CLZ t DOH t CO ADV t OEHZ t CO Single READ BURST READ t OEV t OELZ t CHZ ADV suspends burst. Burst wraps around to its i ...

  • Cypress CY7C1347G - page 13

    CY7C1347G Document #: 38-05516 Rev . *F Page 13 of 22 Figure 6. Write Cycle Timing [16, 17] Switching W aveforms (continued) t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A1 t CEH t CES BWE, BW[A :B] D ata Out (Q) High-Z ADV BURST READ BURST WRITE D(A2) D(A2 + 1) D(A2 + 1) D(A1) D(A3) D(A3 + 1) D(A3 + 2) D(A2 + 3) A2 A3 Data In ...

  • Cypress CY7C1347G - page 14

    CY7C1347G Document #: 38-05516 Rev . *F Page 14 of 22 Figure 7. Read/Write Cycle Timing [16, 18, 19] Switching W aveforms (continued) t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A2 t CEH t CES BWE, BW[A:D] D ata Out (Q) High-Z ADV Single WRITE D(A3) A4 A5 A6 D(A5) D(A6) Data In (D) BURST READ Back-to-Back READs High-Z Q(A2) Q( ...

  • Cypress CY7C1347G - page 15

    CY7C1347G Document #: 38-05516 Rev . *F Page 15 of 22 Figure 8. ZZ Mode Timing [20, 21] Switching W aveforms (continued) t ZZ I SUPPLY CLK ZZ t ZZREC A LL INPUTS (except ZZ) DON’T CARE I DDZZ t ZZI t RZZI Outputs (Q) High-Z DESELECT or READ Only Notes 20. Device must be deselected when entering ZZ mode. See T able 5 on page 7 for all possible sig ...

  • Cypress CY7C1347G - page 16

    CY7C1347G Document #: 38-05516 Rev . *F Page 16 of 22 Ordering Information The following table lists all possible speed, package a nd temperat ure rang e options supported for these devices. Note that so me options listed ma y not be available for order entry . T o verify the availability of a specific op tion, visit the Cypress website at www .cyp ...

  • Cypress CY7C1347G - page 17

    CY7C1347G Document #: 38-05516 Rev . *F Page 17 of 22 250 CY7C1347G-250 AXC 51-85050 100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free Commercial CY7C1347G-250BGC 51-851 15 1 1 9-Ball Bal l Grid Array (14 x 22 x 2.4 mm) CY7C1347G-250BGXC 1 1 9-Ball Bal l Grid Array (14 x 22 x 2.4 mm) Pb-Free CY7C1347G-250BZC 51-85180 165-Ball Fine-Pi tch Ball ...

  • Cypress CY7C1347G - page 18

    CY7C1347G Document #: 38-05516 Rev . *F Page 18 of 22 Package Diagrams Figure 9. 100-Pin Thin Plastic Quad Flatpac k (14 x 20 x 1.4 mm), 51-8 5050 NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE 3. DIMENSIONS IN MILLIMETERS BODY ...

  • Cypress CY7C1347G - page 19

    CY7C1347G Document #: 38-05516 Rev . *F Page 19 of 22 Figure 10. 1 19-Ball BGA (14 x 22 x 2.4 mm), 51 -85 1 15 Package Diagrams (continued) 51-851 15 *B [+] Feedback ...

  • Cypress CY7C1347G - page 20

    CY7C1347G Document #: 38-05516 Rev . *F Page 20 of 22 Figure 11. 165-Ball FBGA (13 x 15 x 1.4 mm), 51-85180 Package Diagrams (continued) A 1 PIN 1 CORNER 15.00±0.10 13.00±0.10 7.00 1.00 Ø0.50 (165X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.35±0.06 SEATING PLANE 0.53±0.05 0.25 C 0.15 C PIN 1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 5 6 7 8 9 10 10.00 ...

  • Cypress CY7C1347G - page 21

    CY7C1347G Document #: 38-05516 Rev . *F Page 21 of 22 Document History Page Document Title: CY7C1347G 4-Mbit (128K x 36) Pipeline d Syn c SRAM Document Number: 38-05516 REV . ECN Submission Date Orig. of Change Description of Change ** 224364 Se e ECN RKF New data sheet *A 276690 See ECN VBL Changed TQFP package in Ordering Informati on section to ...

  • Cypress CY7C1347G - page 22

    Document #: 38-05516 Rev . *F Revised January 15, 20 09 Page 22 of 22 All product s and comp any names me ntioned in this document may be the t rademarks of the ir respecti ve holders. CY7C1347G © Cypress Semicondu ctor Corpor ation, 2004-2009. The informatio n contai ned herei n is subject to chan ge without no tice. Cypress S emiconductor Corpor ...

Manufacturer Cypress Category Computer Hardware

Documents that we receive from a manufacturer of a Cypress CY7C1347G can be divided into several groups. They are, among others:
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All of them are important, but the most important information from the point of view of use of the device are in the user manual Cypress CY7C1347G.

A group of documents referred to as user manuals is also divided into more specific types, such as: Installation manuals Cypress CY7C1347G, service manual, brief instructions and user manuals Cypress CY7C1347G. Depending on your needs, you should look for the document you need. In our website you can view the most popular manual of the product Cypress CY7C1347G.

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A manual, also referred to as a user manual, or simply "instructions" is a technical document designed to assist in the use Cypress CY7C1347G by users. Manuals are usually written by a technical writer, but in a language understandable to all users of Cypress CY7C1347G.

A complete Cypress manual, should contain several basic components. Some of them are less important, such as: cover / title page or copyright page. However, the remaining part should provide us with information that is important from the point of view of the user.

1. Preface and tips on how to use the manual Cypress CY7C1347G - At the beginning of each manual we should find clues about how to use the guidelines. It should include information about the location of the Contents of the Cypress CY7C1347G, FAQ or common problems, i.e. places that are most often searched by users in each manual
2. Contents - index of all tips concerning the Cypress CY7C1347G, that we can find in the current document
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5. FAQ - Frequently Asked Questions
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