Manual Maxim DS5001FP

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  • Maxim DS5001FP - page 1

    1 of 26 052302 Note: Some rev isions of this device may incorporate deviations fro m published specifications known as errata. Multiple revisi ons of any device m ay be simulta neously av ailable through various sales chann els. For inf ormation abou t device errata, click here: http://www.maxim-ic.com/errata . FEATURES § 8051-compatible micropro ...

  • Maxim DS5001FP - page 2

    DS5001FP 2 of 26 DESCRIPTION The DS5001FP 128k soft microprocessor chip is an 8051-compatible microp ro cessor based on NV RAM technology and designed for s ystems that need la rge quantities of nonvolatile memory. It provides full compatibility with the 8051 instructi on set, timers, serial port, and pa rallel I/O ports. By using NV RAM instead of ...

  • Maxim DS5001FP - page 3

    DS5001FP 3 of 26 Figure 1. BLOCK DI AGRA M ...

  • Maxim DS5001FP - page 4

    DS5001FP 4 of 26 PIN DESCRIPTION 80-PIN MQ FP 44-PIN MQ FP SIGNAL DESCR IPTION 11, 9, 7, 5, 1, 79, 77, 75 31 (P0.5) P0.0–P 0.7 General-Purpose I/O Port 0. This port i s open- drain and cann ot drive a log ic 1. It requi res external pullups. Port 0 is also the m ultiplexed expanded address/ data bus. When used in this mode, it doe s not require p ...

  • Maxim DS5001FP - page 5

    DS5001FP 5 of 26 33, 35, 37 9 and A15 res pectively. 71, 69, 67, 65, 61, 59, 57, 55 28, 26, 24, 23, 21, 20, 19, 18 BD7–0 Byte-Wide Data-Bus Bits 7–0 . This 8-bit, bidirectional bus is combined with the nonmultiplex ed address bu s (BA14–0) to access NV SRA M. Decoding is perf ormed on CE1 and CE2 . Read/write access is controlled by R/ W . BD ...

  • Maxim DS5001FP - page 6

    DS5001FP 6 of 26 INSTRUCTION SET The DS5001FP executes an instruction set that is obj ect code-comp atible with the industry standard 8051 microcontro ller. As a result, software dev elopment pac kages such as assembler s and compiler s that have been written for the 8051 are compatible with the DS 5001FP. A complete description of the instruction ...

  • Maxim DS5001FP - page 7

    DS5001FP 7 of 26 Figu re 3. ME MORY MA P IN PA RTITIONA BLE MODE (PM = 0) Note: Partitionable mode is not supported when MSEL pin = 0 (128kB mode). ...

  • Maxim DS5001FP - page 8

    DS5001FP 8 of 26 Figure 4. MEM ORY MAP WITH PES = 1 ...

  • Maxim DS5001FP - page 9

    DS5001FP 9 of 26 Figure 5 illustrates a typical memo ry connection for a s ystem using a 128kB SRAM. Note that in this configuration, both program and data are stored in a common RAM chip Figure 6 shows a similar s ystem with using two 32kB SRAMs. The byte-wide addre ss bus connects to the SRAM address lines. The bidirectional byte-wide data bus co ...

  • Maxim DS5001FP - page 10

    DS5001FP 10 of 26 Figure 6. DS5001FP CONNECTION TO 64k x 8 SRAM POWER M A N AGEMENT The DS5001FP monitors V CC to provide power-fail reset, earl y war ning power-f ail interrupt, and switc h over to lithium backup. It uses an internal band gap re ference in dete rmining the switch points. These are called V PF W , V CCMIN , and V LI , respec tively ...

  • Maxim DS5001FP - page 11

    DS5001FP 11 of 26 ABSOLUTE MA XIM UM RA TINGS* Voltage Range on An y Pin Re lative to Ground -0.3V to (V CC + 0.5V) Voltage Range on V CC Related to Ground -0.3 ° C to 6.0 ° C Operatin g Temperature R ange -40 ° C to +85 ° C Storage Temper ature Range 1 -55 ° C to +125 ° C Soldering Temperature See IPC/JEDEC J-STD-020A * This is a stress rati ...

  • Maxim DS5001FP - page 12

    DS5001FP 12 of 26 DC CHARACTERISTICS (continued) (T A = 0°C to +70°C; V CC = 5V ±10%) PARAM ETER SYMBOL MIN TYP MAX UNITS N OTES Input L eakage Current 0.45 < V IN < V CC (Port 0, MSEL) I IL +10 µA RST Pulldown Resistor (0°C to +70°C) R RE 40 150 k W RST Pulldown Resistor (-40°C to +85°C) R RE 30 180 k W 10 VRST Pullup Resistor R VR 4 ...

  • Maxim DS5001FP - page 13

    DS5001FP 13 of 26 AC C H AR AC T E R I S T I C S EXPANDED BUS MODE TIMING SPECIFICA TIONS (T A = 0°C to +70°C; V CC = 5V ±10%) # PARA METER SYMBOL MI N MAX UNITS 1 Oscillator Frequency 1/ t CLK 1.0 16 MHz 2 ALE Pulse Width t ALPW 2t CLK - 40 ns 3 Address Valid to ALE Low t AV AL L t CLK - 40 ns 4 Address Hold After A LE Low t AVA AV t CLK - 35 n ...

  • Maxim DS5001FP - page 14

    DS5001FP 14 of 26 EXPANDED PROGRAM-MEMORY RE AD CYCLE EXPANDED DATA-M EMORY RE AD CYCLE ...

  • Maxim DS5001FP - page 15

    DS5001FP 15 of 26 EXPANDED DATA-M EMORY WRI TE CYCLE ...

  • Maxim DS5001FP - page 16

    DS5001FP 16 of 26 AC C H AR AC T E R I S T I C S (continued) EXTERNAL CLOCK DRIVE (T A = 0°C to +70°C; V CC = 5V ±10%) # PARA METER SYMBOL MIN MAX U NITS 28 External Clock-High Time at 12MHz at 16MHz t CLK HPW 20 15 ns 29 External Clock-Low Time at 12MHz at 16MHz t CLKL PW 20 15 ns 30 External Clock-Rise Time at 12MHz at 16MHz t CLK R 20 15 ns 3 ...

  • Maxim DS5001FP - page 17

    DS5001FP 17 of 26 AC C H AR AC T E R I S T I C S (continued) POWER CYCLE TIME (T A = 0 °C to +70 °C; V CC = 5V ±10% ) # PARA METER SYMBOL MIN MAX U NITS 32 Slew Rate from V CCMI N to V LI t F 130 µs 33 Cry stal Startup Time t CSU (Note 9) 34 Power-On Reset Dela y t POR 21,504 t CLK POWER CYCLE TIMING ...

  • Maxim DS5001FP - page 18

    DS5001FP 18 of 26 AC C H AR AC T E R I S T I C S (continued) SERIAL PORT TIMING, MODE 0 (T A = 0°C to +70°C; V CC = 5V ±10%) # P ARAMETER SYMBOL MIN MAX UNITS 35 Serial-Port Clock-Cycle Time t SPCLK 12t CLK µs 36 Output-Data Setup to Rising-Clock Edge t DOCH 10t CLK - 133 ns 37 Output-Data Hold After Rising-Clock Edge t CHDO 2t CLK - 117 ns 38 ...

  • Maxim DS5001FP - page 19

    DS5001FP 19 of 26 AC C H AR AC T E R I S T I C S (continued) BYTE-WIDE A DDRESS/DATA BUS TIMING (T A = 0°C to +70°C; V CC = 5V ±10%) # PARA METER SYMBOL MIN MA X UNITS 40 Delay to Byte- Wide Address Valid from CE1 , CE2 , or CE1N Low During Op Code Fetch t CE1L PA 30 ns 41 Pulse Width of CE 1-4, PE 1-4 or CE1N t CEPW 4t CLK - 35 ns 42 Byte-Wide ...

  • Maxim DS5001FP - page 20

    DS5001FP 20 of 26 BYTE-WIDE BUS TIMING RPC AC CHARACTERISTI CS, DBB READ (T A = 0°C to + 70°C; V CC = 5V ±10%) # PARA METER SYMBOL MIN MAX U NITS 54 CS , A 0 Setup to RD t AR 0n s 55 CS , A 0 Hold After RD t RA 0n s 56 RD Pulse Width t RR 160 ns 57 CS , A 0 to Data-Out Delay t AD 130 ns 58 RD to Data-Out Delay t RD 0 130 ns 59 RD to Data-Floa t ...

  • Maxim DS5001FP - page 21

    DS5001FP 21 of 26 RPC AC CHARACTERISTI CS, DBB WRITE (T A = 0°C to +70°C; V CC = 5V ±10%) # PARA METER SYMBOL MIN MAX U NITS 60 CS , A 0 Setup to WR t AW 0n s 61A CS , Hold After WR t WA 0n s 61B A 0 , Hold After WR t WA 20 ns 62 WR Pulse Width t WW 160 ns 63 Data Setup to WR t DW 130 ns 64 Data Hold After WR t WD 20 ns AC CHARA CTERISTICS, D MA ...

  • Maxim DS5001FP - page 22

    DS5001FP 22 of 26 RPC TIMING MO DE ...

  • Maxim DS5001FP - page 23

    DS5001FP 23 of 26 NOTES: All parameters appl y to both co mmercial and indus trial temperature operation unless otherwise noted. 1) All voltages are referenced to ground. 2) Maximum operating I CC is measured with all output pins disconnected; XTAL1 driv en with t CL KR , t CLKF = 10ns, V IL = 0.5V; XTAL2 disconnected; RST = PORT0 = V CC , MSEL = V ...

  • Maxim DS5001FP - page 24

    DS5001FP 24 of 26 80-PIN MQFP MM DIM MIN M A X A -3 . 4 0 A1 0.25 - A2 2.55 2.87 B 0.30 0.50 C 0.13 0.23 D 23.70 24.10 D1 19.90 20.10 E 17.70 18.10 E1 13.90 14.10 e 0.80 BSC L 0.65 0.95 56-G4005- 001 ...

  • Maxim DS5001FP - page 25

    DS5001FP 25 of 26 44-PIN MQFP ...

  • Maxim DS5001FP - page 26

    DS5001FP 26 of 26 REVISION HISTORY The following represent the key differenc es between 112795 and 073096 version of the DS5001 FP data sheet. Please r eview this summar y carefull y . 1) Chang e V CC02 specification from V LI - 0.5 to V LI - 0.65 (PCN F62501). 2) Update mechanical specifications. The following represent the key differenc es betwee ...

Manufacturer Maxim Category Computer Hardware

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