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Manual Cypress CY7C1568V18

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  • Cypress CY7C1568V18 - page 1

    72-Mbit DDR-II+ SRAM 2-W ord Burst Architecture (2.5 Cycle Read Latency) CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-06551 Rev . *E Revised March 1 1, 2008 Features ■ 72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36) ...

  • Cypress CY7C1568V18 - page 2

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 2 of 28 Logic Block Diagram (CY7C1566V18) Logic Block Diagram (CY7C1577V18) CLK A (21:0) Gen. K K Control Logic Address Register Read Add. Decode Read Data Reg. R/W DQ [7:0] Output Logic Reg. Reg. Reg. 8 8 16 8 NWS [1:0] V REF Write Add. Decode 8 8 LD Control ...

  • Cypress CY7C1568V18 - page 3

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 3 of 28 Logic Block Diagram (CY7C1568V18) Logic Block Diagram (CY7C1570V18) CLK A (20:0) Gen. K K Control Logic Address Register Read Add. Decode Read Data Reg. R/W DQ [17:0] Output Logic Reg. Reg. Reg. 18 18 36 18 BWS [1:0] V REF Write Add. Decode 18 18 LD C ...

  • Cypress CY7C1568V18 - page 4

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 4 of 28 Pin Configuration The pin configuration for CY7C1566V18, CY7C 1577 V18, CY7C1568V18, and CY7C15 70V18 follow . [2] 165-Ball FBGA (15 x 17 x 1 .4 mm) Pinout CY7C1566V18 (8M x 8) 123456789 10 11 A CQ AA R / W NWS 1 K NC/144M LD AA C Q B NC NC NC A NC/28 ...

  • Cypress CY7C1568V18 - page 5

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 5 of 28 CY7C1568V18 (4M x 1 8) 123456789 10 11 A CQ AA R / W BWS 1 K NC/14 4M LD AA C Q B NC DQ9 NC A NC/288M K BWS 0 AN C N C D Q 8 C NC NC NC V SS AN CA V SS NC DQ7 NC D NC NC DQ10 V SS V SS V SS V SS V SS NC NC NC E NC NC DQ1 1 V DDQ V SS V SS V SS V DDQ N ...

  • Cypress CY7C1568V18 - page 6

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 6 of 28 Pin Definitions Pin Name IO Pin Descripti on DQ [x:0] Input and Output Synchronous Dat a Input and Outp ut Signals . Inputs are sampled on the rising edge of K and K clocks during valid write operations. These pins drive out the requested data during ...

  • Cypress CY7C1568V18 - page 7

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 7 of 28 ZQ Input Output Impeda nce Matching In put . This input is used to tune the dev ice outputs to the system data bus impedance. CQ, CQ , an d Q [x:0] output impedance are set to 0.2 x RQ, where RQ is a resistor connected between ZQ and ground. Alternati ...

  • Cypress CY7C1568V18 - page 8

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 8 of 28 Functional Overview The CY7C1566V18, CY7C1577V18, CY7C1 568V18, and CY7C1570V18 are synchronous pipelined Burst SRAMs equipped with a DDR interface. Accesses are initia ted on the positive input clock (K). All synchronous input and output timing is re ...

  • Cypress CY7C1568V18 - page 9

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 9 of 28 Echo Clocks Echo clocks are provided on the DDR- II+ to simplify data capture on high-speed systems. T wo echo clocks ar e generated by the DDR-II+. CQ is referenced with respect to K a nd CQ is refer- enced with respect to K . These are free-running ...

  • Cypress CY7C1568V18 - page 10

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 10 of 28 T ruth T able The truth table for CY7C1566V18, CY7C1577V18, CY7C1568V18, and CY7C1570V18 follows. [3, 4, 5, 6, 7, 8] Operation K LD R/W DQ DQ Write Cycle: Load address; wait one cycle; input write data on consecutive K and K rising edges. L-H L L D(A ...

  • Cypress CY7C1568V18 - page 11

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 1 1 of 28 Write Cycle Descriptions The write cycle description t able for CY7C1 577V18 follows. [3, 9] BWS 0 K K Comments L L–H – During the data portion of a write sequence, th e single byte (D [8:0] ) is written into the device. L – L–H During the d ...

  • Cypress CY7C1568V18 - page 12

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 12 of 28 IEEE 1 149.1 Serial Boundary Scan (JT AG) These SRAMs incorporate a serial boundary scan T est Access Port (T AP) in the FBGA p ackage. This part is fully comp liant with IEEE S tandard #1 149.1-2001. The T AP operates usin g JEDEC standard 1.8V IO l ...

  • Cypress CY7C1568V18 - page 13

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 13 of 28 IDCODE The IDCODE instruction loads a vendor-specific, 32-bi t code into the instruction re gister . It also places the instruction register between the TDI and TDO pins and shifts the IDCODE out of the device when the T AP controller enters the Shif ...

  • Cypress CY7C1568V18 - page 14

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 14 of 28 T AP Controller St ate Diagram The state diagram for the T AP controller follows. [10] TEST -LOGIC RESET TEST -LOG IC/ IDLE SELECT DR-SCAN CAPTURE-DR SHIFT -DR EXIT1-DR P AUSE-DR EXIT2-DR UPDA TE-DR 1 0 1 1 0 1 0 1 0 0 0 1 1 1 0 1 0 1 0 0 0 1 0 1 1 0 ...

  • Cypress CY7C1568V18 - page 15

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 15 of 28 T AP Controller Block Diagram T AP Electrical Characteristics Over the Operating Range [1 1, 12, 13] Parameter Description T est Conditions Min Max Unit V OH1 Output HIGH V oltage I OH = − 2.0 mA 1.4 V V OH2 Output HIGH V oltage I OH = − 100 μ A ...

  • Cypress CY7C1568V18 - page 16

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 16 of 28 T AP AC Switching Characteristics Over the Operating Range [12, 14] Parameter Description Min Max Unit t TCYC TCK Clock Cycle Time 50 ns t TF TCK Clock Frequency 20 MHz t TH TCK Clock HIGH 20 ns t TL TCK Clock LOW 20 ns Setup Times t TMSS TMS Setup t ...

  • Cypress CY7C1568V18 - page 17

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 17 of 28 Identification R egi ster Definitions Instruction Field Va l u e Description CY7C1566V18 CY7C1577V18 C Y7C1568V18 CY7C15 70V18 Revision Numb er (31:29) 000 000 000 000 V ersio n number . Cypress Device ID (28:12) 1 101 01 1 1000000100 1 10101 1 100 0 ...

  • Cypress CY7C1568V18 - page 18

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 18 of 28 Boundary Scan Order Bit Number Bump ID Bit Number Bump ID Bit Number Bump ID Bit Number Bump ID 0 6R 28 10G 56 6A 84 1J 1 6 P2 9 9 G 5 7 5 B8 5 2 J 2 6N 30 1 1F 58 5A 86 3K 3 7P 31 1 1G 59 4A 87 3J 4 7 N3 2 9 F 6 0 5 C8 8 2 K 5 7R 33 10F 61 4B 89 1K ...

  • Cypress CY7C1568V18 - page 19

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 19 of 28 Power Up Sequence in DDR-II+ SRAM DDR-II+ SRAMs must be powered up and i nitialized in a predefined manner to prevent unde fined operations. During power up, when the DOFF is tied HIGH, the DLL is locked a fter 2048 cycles of st able clock. Power Up ...

  • Cypress CY7C1568V18 - page 20

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 20 of 28 Maximum Ratings Exceeding maximum ratin gs may impair the useful life o f the device. These user guidelines are not teste d. S torage T emperature ........................... ...... –65°C to +150°C Ambient T emperature with Pow e r App l i ed. . ...

  • Cypress CY7C1568V18 - page 21

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 21 of 28 I SB1 Automatic Power down Current Max V DD , Both Ports Deselected, V IN ≥ V IH or V IN ≤ V IL f = f MAX = 1/t CYC , Inputs S tatic 400MHz (x8) 550 mA (x9) 550 (x18) 550 (x36) 550 375MHz (x8) 525 mA (x9) 525 (x18) 525 (x36) 525 333MHz (x8) 500 m ...

  • Cypress CY7C1568V18 - page 22

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 22 of 28 AC T est Loads and W aveforms Figure 4. AC T est Loads and Waveforms 1.25V 0.25V R = 50 Ω 5p F INCLUDING JIG AND SCOPE ALL INPUT PULSES Device R L = 50 Ω Z 0 = 50 Ω V REF = 0.75V V REF = 0.75V [21] 0.75V Under Te s t 0.75V Device Under Te s t OUTP ...

  • Cypress CY7C1568V18 - page 23

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 23 of 28 Switching Characteristics Over the Operating Range [21, 22] Cypress Parameter Consor tium Parameter Description 400 MHz 375 MHz 333 MHz 300 MHz Unit Min Max Min Max Min Max Min Max t POWER V DD (T ypical) to the First Access [23] 1–1–1–1– m s ...

  • Cypress CY7C1568V18 - page 24

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 24 of 28 Switching W aveforms Read/Writ e/Deselect Sequence [29, 30, 31] Figure 5. W aveform for 2.5 Cycle Read L atency 1 2 3 4 5 6 7 89 10 READ READ NOP WRITE WRITE t NOP 11 LD R/W A t KH t KL t CYC t HC t SA t HA DON’ T CARE UNDEFINED SC A0 A1 A2 A3 A4 C ...

  • Cypress CY7C1568V18 - page 25

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 25 of 28 Ordering Information Not all of the speed, package, and tem perature ranges are available. Contact your local sales represe ntative or visit www .cypress.com for actual products offered. Spee d (MHz) Ordering Code Package Diagram Package T ype Operat ...

  • Cypress CY7C1568V18 - page 26

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 26 of 28 333 CY7C1566V18-333BZC 51-85195 165-Ball Fine Pi tch Ball Grid Array (15 x 17 x 1.4 mm) Commercial CY7C1577V18-333BZC CY7C1568V18-333BZC CY7C1570V18-333BZC CY7C1566V18-333BZXC 51-85195 165-Ball Fine Pi tch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free C ...

  • Cypress CY7C1568V18 - page 27

    CY7C1566V18, CY7C1577V18 CY7C1568V18, CY7C1570V18 Document Number: 001-06551 Rev . *E Page 27 of 28 Package Diagram Figure 6. 165-Ball FBGA (15 x 17 x 1.4 mm) !  0).#/2.%2 ¼ ¼   8  ...

  • Cypress CY7C1568V18 - page 28

    Document Number: 001-06551 Rev . *E Revised March 1 1, 2008 Page 28 of 28 QDR RAMs an d Quad Data R ate RAMs comprise a new family o f products devel oped by Cypress, IDT , NEC, Renesas, and Samsung. All pr oduct and comp any names ment ioned in this do cument are the tr ad emarks of their respe ctive hold ers. CY7C1566V18, CY7C1577V18 CY7C1568V18, ...

Manufacturer Cypress Category Computer Hardware

Documents that we receive from a manufacturer of a Cypress CY7C1568V18 can be divided into several groups. They are, among others:
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All of them are important, but the most important information from the point of view of use of the device are in the user manual Cypress CY7C1568V18.

A group of documents referred to as user manuals is also divided into more specific types, such as: Installation manuals Cypress CY7C1568V18, service manual, brief instructions and user manuals Cypress CY7C1568V18. Depending on your needs, you should look for the document you need. In our website you can view the most popular manual of the product Cypress CY7C1568V18.

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A manual, also referred to as a user manual, or simply "instructions" is a technical document designed to assist in the use Cypress CY7C1568V18 by users. Manuals are usually written by a technical writer, but in a language understandable to all users of Cypress CY7C1568V18.

A complete Cypress manual, should contain several basic components. Some of them are less important, such as: cover / title page or copyright page. However, the remaining part should provide us with information that is important from the point of view of the user.

1. Preface and tips on how to use the manual Cypress CY7C1568V18 - At the beginning of each manual we should find clues about how to use the guidelines. It should include information about the location of the Contents of the Cypress CY7C1568V18, FAQ or common problems, i.e. places that are most often searched by users in each manual
2. Contents - index of all tips concerning the Cypress CY7C1568V18, that we can find in the current document
3. Tips how to use the basic functions of the device Cypress CY7C1568V18 - which should help us in our first steps of using Cypress CY7C1568V18
4. Troubleshooting - systematic sequence of activities that will help us diagnose and subsequently solve the most important problems with Cypress CY7C1568V18
5. FAQ - Frequently Asked Questions
6. Contact detailsInformation about where to look for contact to the manufacturer/service of Cypress CY7C1568V18 in a specific country, if it was not possible to solve the problem on our own.

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